Re: [Xen-devel] Questions regarding implementing mem_event for PV

[Andres Lagar-Cavilla <andreslc@xxxxxxxxxxxxxx>]

> I am looking in to implementing mem_event for PV guests that use PV mmu_ops. 
> Initially I am thinking of supporting 64-bit PV guests. I think only RW, RX 
> and R permissions would be possible. I am looking at the hypercall interfaces 
> that do the pagetable manipulations. In addition to the hypercalls I am also 
> looking at the pagetable write emulation code.
I'm assuming mem_access here, rather than generic mem_event…

> 
> My plan is to set the page permissions in:
> do_mmu_update()
> do_mmuext_op(MMUEXT_PIN_L1_TABLE)
> __do_update_va_mapping()
> ptwr_emulated_update()
> 
> I would then hook in to do_page_fault() to perform the access check and send 
> the request to the mem_event handler. Please let me know if I am on the right 
> track and if this is a sane approach?
> 
> Questions...
> I am not sure where to store the p2m_access value in the PTE. EPT uses bits 
> 61:58. The spec says they are ignored for regular pagetables, so is it safe 
> to use these bits? If not, do you have any suggestions about where I can 
> stash these bits?
Depends on the PV guest. If using auto-translated physmap (i.e. PVH but not for 
dom0), then you will have a proper EPT. You can probably just rely on the same 
men-event implementation that exists for HVMs (hand-waving though).

On a traditional PV, you will need to turn on shadow. I don't think you will 
get to where you want by changing the PT entries the guest sees. Or you will, 
but more painfully (hand waving, redux)

Once you turn on shadows, that uses the pt implementation of the p2m 
(arch/x86/mm/p2m-pt.c), which AMD also uses. There is room in there for mem 
access bits. From a previous thread on xen-devel the IOMMU bits can be 
sacrificed to host mem access bits, and the hypervisor already implements XOR 
for IOMMU and "fancy memory stuff"

HTH
Andres
> The default functions for p2m->set_entry() and p2m->get_entry() default to 
> the shadow PT variants which I am assuming cannot be used in the PV cases and 
> I would need to do something along the lines of mod_l1_entry(). Is this 
> correct?
> 
> Thanks,
> Aravindh


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