Re: [Xen-devel] [PATCH v2 2/3] Nested VMX: Clear bit 31 of IA32_VMX_BASIC MSR

[Andrew Cooper <andrew.cooper3@xxxxxxxxxx>]

On 10/09/13 07:14, Yang Zhang wrote:
> From: Yang Zhang <yang.z.zhang@xxxxxxxxx>
>
> The bit 31 of revision_id will set to 1 if vmcs shadowing enabled. And
> according intel SDM, the bit 31 of IA32_VMX_BASIC MSR is always 0. So we
> cannot set low 32 bit of IA32_VMX_BASIC to revision_id directly. Must clear
> the bit 31 to 0.
>
> Signed-off-by: Yang Zhang <yang.z.zhang@xxxxxxxxx>

Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>

> ---
>  xen/arch/x86/hvm/vmx/vvmx.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
> index c6c8b88..122462f 100644
> --- a/xen/arch/x86/hvm/vmx/vvmx.c
> +++ b/xen/arch/x86/hvm/vmx/vvmx.c
> @@ -1847,7 +1847,7 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 
> *msr_content)
>      switch (msr) {
>      case MSR_IA32_VMX_BASIC:
>          data = (host_data & (~0ul << 32)) |
> -               ((v->arch.hvm_vmx.vmcs)->vmcs_revision_id);
> +               (v->arch.hvm_vmx.vmcs->vmcs_revision_id & 0x7fffffff);
>          break;
>      case MSR_IA32_VMX_PINBASED_CTLS:
>      case MSR_IA32_VMX_TRUE_PINBASED_CTLS:


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