Re: [Xen-devel] [PATCH v4 3/4] VMX: use proper instruction mnemonics if assembler supports them

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 26.08.13 at 17:10, Andrew Cooper <andrew.cooper3@xxxxxxxxxx> wrote:
> On 26/08/2013 16:07, Andrew Cooper wrote:
>> On 26/08/2013 15:29, Jan Beulich wrote:
>>>>>> On 26.08.13 at 16:18, Andrew Cooper <andrew.cooper3@xxxxxxxxxx> wrote:
>>>> On 26/08/2013 15:03, Jan Beulich wrote:
>>>>> @@ -365,14 +398,22 @@ static inline void __invept(int type, u6
>>>>>           !cpu_has_vmx_ept_invept_single_context )
>>>>>          type = INVEPT_ALL_CONTEXT;
>>>>>  
>>>>> -    asm volatile ( INVEPT_OPCODE
>>>>> -                   MODRM_EAX_08
>>>>> +    asm volatile (
>>>>> +#ifdef HAVE_GAS_EPT
>>>>> +                   "invept %0, %q1\n"
>>>> Another stray q
>>> No - operand 1 is of type "int", and while the high 32 bits get
>>> ignored (i.e. we don't need to do any zero- or sign-extension), we
>>> still need to specify the 64-bit register name here. Or wait - I
>>> thought it would ignore the upper bits, but it's not documented to.
>>> In which case this involves more than just dropping the q modifier.
>> I was more referring to having a q in the instruction, yet an "r" in the
>> parameter list.  I would suggest
> 
> Sorry - sent early.  I would suggest putting all constraints beside
> their values, rather than mixing them in amongst the asm code itself,
> but do admit that this is only a matter of preference.

That statement of yours seems to underline that your mixing up
the meanings of q depending on where it's actually used.

Jan


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