Re: [Xen-devel] cpuidle and un-eoid interrupts at the local apic

[Thimo EichstÃdt <thimoe@xxxxxxxxxx>]

Hello Yang,

any update from your side ? Did your expert have any idea ? Possible 
Hardware problem ?
Best regards
  Thimo

Am 20.08.2013 10:50, schrieb Zhang, Yang Z:
> Jan Beulich wrote on 2013-08-20:
> > > > > On 20.08.13 at 07:43, Thimo EichstÃdt<thimoe@xxxxxxxxxx> wrote:
> > > (XEN) **Pending EOI error^M (XEN)   irq 29, vector 0x21^M (XEN)   s[0]
> > > irq 30, vec 0x31, ready 0, ISR 00000001, TMR 00000000, IRR 00000000^M
> > > (XEN) All LAPIC state:^M (XEN) [vector]      ISR      TMR      IRR^M
> > > (XEN) [1f:00] 00000000 00000000 00000000^M (XEN) [3f:20] 00020002
> > > 00000000 00000000^M
> > It ought to be plain impossible to receive an interrupt at vector
> > 0x21 while the ISR bit for vector 0x31 is still set.
> >
> > Intel folks - any input on this?
> I have no idea with this. But I will forward the information to some experts 
> internally for help.
>
> > Jan
> Best regards,
> Yang
>
>
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