Re: [Xen-devel] [PATCH v2 3/3] xen/arm: Enable switch to hyp mode for OMAP5432

[Chen Baozi <baozich@xxxxxxxxx>]

在 2013-8-15，22:09，Andrii Anisov <andrii.anisov@xxxxxxxxxxxxxxx> 写道：

> Chen,
> 
> Your changes will not work on OMAP5. You could have a quick check -
> just don't switch to hyp in u-boot.

Have you tried the latest upstream u-boot?

> Changes should look like following:
> 
> 
> diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
> index 0588d54..b6ccd6a 100644
> --- a/xen/arch/arm/arm32/head.S
> +++ b/xen/arch/arm/arm32/head.S
> @@ -21,6 +21,8 @@
> #include <asm/page.h>
> #include <asm/processor-ca15.h>
> #include <asm/asm_defns.h>
> +#include <asm/platforms/omap5.h>
> +
> 
> #define ZIMAGE_MAGIC_NUMBER 0x016f2818
> 
> @@ -137,7 +139,6 @@ boot_cpu:
>         mov   r0, r5
>         bl    putn
>         PRINT(" -\r\n")
> -
>         /* Check that this CPU has Hyp mode */
>         mrc   CP32(r0, ID_PFR1)
>         and   r0, r0, #0xf000        /* Bits 12-15 define virt extensions */
> @@ -155,6 +156,9 @@ boot_cpu:
>         b     hyp
> 1:
>         /* Otherwise, it must have been Secure Supervisor mode */
> +        ldr   r0, =MACH_TYPE_PANDA_NG
> +        teq   r5, r0                          /* Are we running on
> the panda omap5? */
> +        beq   1f                              /* do not access SCR
> from nonsecure state */
>         mrc   CP32(r0, SCR)
>         tst   r0, #0x1               /* Not-Secure bit set? */
>         beq   1f
> @@ -166,7 +170,6 @@ boot_cpu:
>         ldr   r0, =enter_hyp_mode    /* VA of function */
>         adr   lr, hyp                /* Set return address for call */
>         add   pc, r0, r10            /* Call PA of function */
> -
> hyp:
> 
>         /* Zero BSS On the boot CPU to avoid nasty surprises */
> diff --git a/xen/arch/arm/arm32/mode_switch.S 
> b/xen/arch/arm/arm32/mode_switch.S
> index c92a1cf..7a44e67 100644
> --- a/xen/arch/arm/arm32/mode_switch.S
> +++ b/xen/arch/arm/arm32/mode_switch.S
> @@ -21,6 +21,7 @@
> #include <asm/page.h>
> #include <asm/platforms/vexpress.h>
> #include <asm/platforms/exynos5.h>
> +#include <asm/platforms/omap5.h>
> #include <asm/asm_defns.h>
> #include <asm/gic.h>
> 
> @@ -34,6 +35,9 @@ kick_cpus:
>         ldr   r0, =MACH_TYPE_SMDK5250
>         teq   r5, r0                          /* Are we running on
> the arndale? */
>         beq   kick_cpus_arndale
> +        ldr   r0, =MACH_TYPE_PANDA_NG
> +        teq   r5, r0                          /* Are we running on
> the panda omap5? */
> +        beq   kick_cpus_omap5
>         /* otherwise versatile express */
>         /* write start paddr to v2m sysreg FLAGSSET register */
>         ldr   r0, =(V2M_SYS_MMIO_BASE)        /* base V2M sysreg MMIO
> address */
> @@ -47,6 +51,17 @@ kick_cpus:
>         dsb
>         ldr   r2, =V2M_GIC_BASE_ADDRESS       /* r2 := VE gic base address */
>         b     kick_cpus_sgi
> +kick_cpus_omap5:
> +        ldr   r0, =OMAP_AUX_CORE_BOOT_0
> +        ldr   r2, =0x20
> +        str   r2, [r0], #4  /*Update the AuxCoreBoot0 with boot state
> for secondary core.*/
> +        dsb
> +        ldr   r2, =start
> +        add   r2, r2, r10
> +        str   r2, [r0]    /* Write the address of secondary startup
> to the AuxCoreBoot1 */
> +        dsb
> +        sev
> +        mov   pc, lr
> kick_cpus_arndale:
>         /* write start paddr to CPU 1 sysreg register */
>         ldr   r0, =(S5P_PA_SYSRAM)
> @@ -82,6 +97,10 @@ kick_cpus_sgi:
> 
> .globl enter_hyp_mode
> enter_hyp_mode:
> +        ldr   r0, =MACH_TYPE_PANDA_NG
> +        teq   r5, r0                          /* Are we running on
> the panda omap5? */
> +        beq   start_hypervisor_gp
> +
>         mov   r3, lr                 /* Put return address in non-banked reg 
> */
>         cpsid aif, #0x16             /* Enter Monitor mode */
>         mrc   CP32(r0, SCR)
> @@ -152,6 +171,23 @@ skip_spis:
>         msr   spsr_cxsf, r0          /* into the SPSR */
>         movs  pc, r3                 /* Exception-return into Hyp mode */
> 
> +start_hypervisor_gp:
> +        adr   r0, save
> +        stmea r0, {r4-r13,lr}
> +        ldr   r12, =0x102
> +        adr   r0, hyp_return
> +        dsb
> +        isb
> +        dmb
> +        smc   #0
> +hyp_return:
> +        adr   r0, save
> +        ldmfd r0, {r4-r13,pc}
> +save:
> +        .rept 11
> +        .word 0
> +        .endr
> +
> /*
>  * Local variables:
>  * mode: ASM
> 
> Sincerely,
> Andrii Anisov.

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