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Re: [Xen-devel] [PATCH v3] Intel/VPMU: Add support for full-width PMC writes



On Tue, Aug 6, 2013 at 2:21 PM, Boris Ostrovsky
<boris.ostrovsky@xxxxxxxxxx> wrote:
> A recent Linux commit (069e0c3c405814778c7475d95b9fff5318f39834) added
> support for full-width PMC writes to performance counter registers,
> making these registers default for perf. Since current Xen VPMU does
> not support these new MSRs perf will fail to initialise in guests.
>
> Signed-off-by: Boris Ostrovsky <boris.ostrovsky@xxxxxxxxxx>
> Reviewed-by: Dietmar Hahn <dietmar.hahn@xxxxxxxxxxxxxx>
> ---

Acked-by: Jun Nakajima <jun.nakajima@xxxxxxxxx>

-- 
Jun
Intel Open Source Technology Center

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