Re: [Xen-devel] [PATCH] xen/arm: Trap the ACTLR register

[Ian Campbell <Ian.Campbell@xxxxxxxxxx>]

On Thu, 2013-07-04 at 16:01 +0100, Julien Grall wrote:
> @@ -452,6 +451,12 @@ int vcpu_initialise(struct vcpu *v)
>          return rc;
>  
>      v->arch.sctlr = SCTLR_BASE;
> +    v->arch.actlr = READ_SYSREG32(ACTLR_EL1);
> +    /* XXX: Handle other than CA15 cpus */
> +    if ( v->domain->max_vcpus > 1 )
> +        v->arch.actlr |= ACTLR_CA15_SMP;
> +    else
> +        v->arch.actlr &= ~ACTLR_CA15_SMP;

I'm not 100% sure about this last bit. A CONFIG_SMP=y kernel will want
to set this regardless of there only being one processor since the
Cortex A15 (and now A7) are both MPCore processors. Granted they don't
actually check or panic etc when we ignore them, so maybe it doesn't
matter.

I'd be tempted to simply expose the raw underling ACTLR_EL1 to guests
(r/o of course), it neatly sidesteps any need to know about specific
processors too. Anyone got any other thoughts?

>  
>      if ( (rc = vcpu_vgic_init(v)) != 0 )
>          return rc;
> diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
> index 398d209..bbd60aa 100644
> --- a/xen/arch/arm/traps.c
> +++ b/xen/arch/arm/traps.c
> @@ -62,7 +62,8 @@ void __cpuinit init_traps(void)
>      WRITE_SYSREG((vaddr_t)hyp_traps_vector, VBAR_EL2);
>  
>      /* Setup hypervisor traps */
> -    
> WRITE_SYSREG(HCR_PTW|HCR_BSU_OUTER|HCR_AMO|HCR_IMO|HCR_VM|HCR_TWI|HCR_TSC, 
> HCR_EL2);
> +    
> WRITE_SYSREG(HCR_PTW|HCR_BSU_OUTER|HCR_AMO|HCR_IMO|HCR_VM|HCR_TWI|HCR_TSC|
> +                 HCR_TAC, HCR_EL2);
>      isb();
>  }
>  
> @@ -836,6 +837,7 @@ static void do_cp15_32(struct cpu_user_regs *regs,
>  {
>      struct hsr_cp32 cp32 = hsr.cp32;
>      uint32_t *r = (uint32_t*)select_user_reg(regs, cp32.reg);
> +    struct vcpu *v = current;
>  
>      if ( !cp32.ccvalid ) {
>          dprintk(XENLOG_ERR, "cp_15(32): need to handle invalid condition 
> codes\n");
> @@ -889,6 +891,10 @@ static void do_cp15_32(struct cpu_user_regs *regs,
>              domain_crash_synchronous();
>          }
>          break;
> +    case HSR_CPREG32(ACTLR):
> +        if ( cp32.read )
> +           *r = v->arch.actlr;
> +        break;
>      default:
>          printk("%s p15, %d, r%d, cr%d, cr%d, %d @ 0x%"PRIregister"\n",
>                 cp32.read ? "mrc" : "mcr",



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