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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v2 1/5] VMX: fix interaction of APIC-V and Viridian emulation
On 24/06/13 08:03, Jan Beulich wrote: Viridian using a synthetic MSR for issuing EOI notifications bypasses the normal in-processor handling, which would clear GUEST_INTR_STATUS.SVI. Hence we need to do this in software in order for future interrupts to get delivered. Based on analysis by Yang Z Zhang <yang.z.zhang@xxxxxxxxx>. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Hmm... so there are three paths which may end up calling this vmx EOI code -- from viridian.c:wrmsr_vidiridan_regs(), from vlapic.c:vlapic_reg_write(), and vmx_handle_eoi_write(). Obviously the viridian code is what we want. But which of the other two paths will also end up taking it, and is it correct? In other words, for which of those will cpu_has_vmx_virtual_intr_delivery be set? -George --- v2: Split off cleanup parts to new patch 3. --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -386,6 +386,9 @@ void vlapic_EOI_set(struct vlapic *vlapivlapic_clear_vector(vector, &vlapic->regs->data[APIC_ISR]); + if ( hvm_funcs.handle_eoi ) _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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