Re: [Xen-devel] Xen 4.3 development update RC2 imminent

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 23.05.13 at 12:36, Fabio Fantoni <fabio.fantoni@xxxxxxx> wrote:
> Il 23/05/2013 09:39, Jan Beulich ha scritto:
>>>>> On 22.05.13 at 18:54, George Dunlap <george.dunlap@xxxxxxxxxxxxx> wrote:
>>> On 22/05/13 17:30, Pasi KÃrkkÃinen wrote:
>>>> On Wed, May 22, 2013 at 04:05:27PM +0100, George Dunlap wrote:
>>>> Hmm, for testing, can we use cpuid to mask out SSE,
>>>> and then try qxl ?
>>> That had occurred to me -- Andrew / Jan, do you know which flag might
>>> disable this particular instruction?
>>>
>>> I guess we could try just disabling all the SSE instructions.
>> movdqu is an SSE2 instruction, so disabling bit 26 of CPUID EDX
>> output to EAX=1 input.
> Can you explain better please?
> Should I add this to test it?
> cpuid="host,sse=0,sse2=0,ssse3=0,sse4_1=0,sse4_2=0,eax=1"

I can't immediately tell you how the tools want this to be
expressed (others on the list surely have done this and can
tell you without much difficulty), but ...

>> However, just like the hypervisor itself does, 64-bit code may
>> imply SSE2 to be available unconditionally (i.e. without looking at
>> any feature flags). In particular, both single and double precision
>> math are done via SSE/SSE2 instructions rather than FPU ones by
>> default on x86-64.

you apparently didn't pay attention to this part - unless you're
working with a 32-bit guest, I can only recommend to stay away
from disabling SSE2 or SSE support.

Jan

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