[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Xen-devel] [PATCH] AMD IOMMU: fill msi_desc fields required by commit fe017c59



>>> On 29.04.13 at 10:34, "Jan Beulich" <JBeulich@xxxxxxxx> wrote:

Ping?

> Since the AMD IOMMU code relies on the x86 generic MSI code, it also
> needs to be updated to match "x86/MSI: cleanup to prepare for multi-
> vector MSI".
> 
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> 
> --- a/xen/drivers/passthrough/amd/iommu_init.c
> +++ b/xen/drivers/passthrough/amd/iommu_init.c
> @@ -775,9 +775,16 @@ static bool_t __init set_iommu_interrupt
>      control = pci_conf_read16(iommu->seg, PCI_BUS(iommu->bdf),
>                                PCI_SLOT(iommu->bdf), PCI_FUNC(iommu->bdf),
>                                iommu->msi.msi_attrib.pos + PCI_MSI_FLAGS);
> -    iommu->msi.msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
> -    desc->handler = control & PCI_MSI_FLAGS_MASKBIT ?
> -                    &iommu_maskable_msi_type : &iommu_msi_type;
> +    iommu->msi.msi.nvec = 1;
> +    if ( is_mask_bit_support(control) )
> +    {
> +        iommu->msi.msi_attrib.maskbit = 1;
> +        iommu->msi.msi.mpos = msi_mask_bits_reg(iommu->msi.msi_attrib.pos,
> +                                                is_64bit_address(control));
> +        desc->handler = &iommu_maskable_msi_type;
> +    }
> +    else
> +        desc->handler = &iommu_msi_type;
>      ret = request_irq(irq, iommu_interrupt_handler, 0, "amd_iommu", iommu);
>      if ( ret )
>      {




_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxx
http://lists.xen.org/xen-devel


 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.