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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [RFC 25/29] xen/arm: Add exynos 4210 UART support
On Mon, 2013-04-29 at 00:02 +0100, Julien Grall wrote:
> Signed-off-by: Julien Grall <julien.grall@xxxxxxxxxx>
WIthout a datasheet there isn't much review to be done,
> ---
> config/arm32.mk | 1 +
> xen/drivers/char/Makefile | 1 +
> xen/drivers/char/exynos5-uart.c | 346
> +++++++++++++++++++++++++++++++++++++++
> 3 files changed, 348 insertions(+)
> create mode 100644 xen/drivers/char/exynos5-uart.c
>
> diff --git a/config/arm32.mk b/config/arm32.mk
> index 83a7767..593a1d1 100644
> --- a/config/arm32.mk
> +++ b/config/arm32.mk
> @@ -19,6 +19,7 @@ CFLAGS += -marm
> # - pl011: printk with PL011 UART
> CONFIG_EARLY_PRINTK := none
> HAS_PL011 := y
> +HAS_EXYNOS5 := y
>
> # Use only if calling $(LD) directly.
> #LDFLAGS_DIRECT_OpenBSD = _obsd
> diff --git a/xen/drivers/char/Makefile b/xen/drivers/char/Makefile
> index e68a54a..12a4b49 100644
> --- a/xen/drivers/char/Makefile
> +++ b/xen/drivers/char/Makefile
> @@ -1,6 +1,7 @@
> obj-y += console.o
> obj-$(HAS_NS16550) += ns16550.o
> obj-$(HAS_PL011) += pl011.o
> +obj-$(HAS_EXYNOS5) += exynos5-uart.o
> obj-$(HAS_EHCI) += ehci-dbgp.o
> obj-$(CONFIG_ARM) += arm-uart.o
> obj-y += serial.o
> diff --git a/xen/drivers/char/exynos5-uart.c b/xen/drivers/char/exynos5-uart.c
> new file mode 100644
> index 0000000..1bae153
> --- /dev/null
> +++ b/xen/drivers/char/exynos5-uart.c
> @@ -0,0 +1,346 @@
> +/*
> + * xen/drivers/char/exynos5-uart.c
> + *
> + * Driver for Exynos 4210 UART.
> + *
> + * Anthony PERARD <anthony.perard@xxxxxxxxxx>
> + * Copyright (c) 2012 Citrix Systems.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <xen/config.h>
> +#include <xen/console.h>
> +#include <xen/errno.h>
> +#include <xen/serial.h>
> +#include <xen/init.h>
> +#include <xen/irq.h>
> +#include <asm/early_printk.h>
> +#include <asm/device.h>
> +
> +static struct exynos5_uart {
> + unsigned int baud, clock_hz, data_bits, parity, stop_bits;
> + struct dt_irq irq;
> + volatile uint32_t *regs;
> + struct irqaction irqaction;
> +} exynos5_com[2] = {{0}};
> +
> +/* register addresses */
> +#define ULCON (0x00/4)
> +#define UCON (0x04/4)
> +#define UFCON (0x08/4)
> +#define UMCON (0x0c/4)
> +#define UTRSTAT (0x10/4)
> +#define UERSTAT (0x14/4)
> +#define UFSTAT (0x18/4)
> +#define UMSTAT (0x1c/4)
> +#define UTXH (0x20/4)
> +#define URXH (0x24/4)
> +#define UBRDIV (0x28/4)
> +#define UFRACVAL (0x2c/4)
> +#define UINTP (0x30/4)
> +#define UINTS (0x34/4)
> +#define UINTM (0x38/4)
> +
> +/* ULCON */
> +#define RXIRQ (0x1<<0)
> +#define RXDMA (0x2<<0)
> +#define TXIRQ (0x1<<2)
> +#define TXDMA (0x2<<2)
> +
> +/* UFCON */
> +#define FIFO_TX_RESET (1<<2)
> +#define FIFO_RX_RESET (1<<1)
> +#define FIFO_EN (1<<0)
> +
> +/* UMCON */
> +#define INT_EN (1<<3)
> +
> +/* UTRSTAT */
> +#define TXE (1<<2)
> +#define TXFE (1<<1)
> +#define RXDR (1<<0)
> +
> +/* Interrupt bits (UINTP, UINTS, UINTM) */
> +#define MODEM (1<<3)
> +#define TXD (1<<2)
> +#define ERROR (1<<1)
> +#define RXD (1<<0)
> +#define ALLI (MODEM|TXD|ERROR|RXD)
> +
> +/* These parity settings can be ORed directly into the ULCON. */
> +#define PARITY_NONE (0)
> +#define PARITY_ODD (0x4)
> +#define PARITY_EVEN (0x5)
> +#define FORCED_CHECKED_AS_ONE (0x6)
> +#define FORCED_CHECKED_AS_ZERO (0x7)
> +
> +static void exynos5_uart_interrupt(int irq, void *data, struct cpu_user_regs
> *regs)
> +{
> + struct serial_port *port = data;
> + struct exynos5_uart *uart = port->uart;
> + unsigned int status = uart->regs[UINTP];
> +
> + if ( status )
> + {
> + do
> + {
> + // clear all pending interrept
> + // but should take care of ERROR and MODEM
Xen comments are always /* */ I think. A bunch of instance of this in
this patch.
> +
> + if ( status & ERROR )
> + {
> + int error_bit = uart->regs[UERSTAT] & 0xf;
> + if ( error_bit & (1 << 0) )
> + printk(XENLOG_ERR "uart: overrun error\n");
> + if ( error_bit & (1 << 1) )
> + printk(XENLOG_ERR "uart: parity error\n");
> + if ( error_bit & (1 << 2) )
> + printk(XENLOG_ERR "uart: frame error\n");
> + if ( error_bit & (1 << 3) )
Can you #define these bits?
[...]
> + // reset FIFO_TX_RESET | FIFO_RX_RESET |
> + uart->regs[UFCON] = (0x6 << 8) | FIFO_EN;
#define
> +
> + /* Enable the UART for RX and TX */
> + // level tx/rx interrupt,only rx
> + // enable rx timeout interrupt
> + uart->regs[UCON] = (0 << 9) | (0 << 8) | RXIRQ | TXIRQ | ( 1 << 7);
More #defines, I expect there's a bunch more too ;-)
> +}
> +
> +static void __init exynos5_uart_init_postirq(struct serial_port *port)
> +{
> + struct exynos5_uart *uart = port->uart;
> + int rc;
> +
> + if ( uart->irq.irq > 0 )
> + {
> + uart->irqaction.handler = exynos5_uart_interrupt;
> + uart->irqaction.name = "exynos5_uart";
> + uart->irqaction.dev_id = port;
> + if ( (rc = setup_irq(uart->irq.irq, &uart->irqaction)) != 0 )
> + printk("ERROR: Failed to allocate exynos5_uart IRQ %d\n",
> + uart->irq.irq);
> +
> + /* Unmask interrupts */
> + uart->regs[UINTM] = 0; //MODEM|TXD|ERROR; // only have rx interrupt
Left over debug?
Ian.
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