Re: [Xen-devel] [PATCH 0/4] x86/IOMMU: multi-vector MSI prerequisites

[Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx>]

On 3/29/2013 12:18 AM, Suravee Suthikulpanit wrote:
> Jan,
>
> I found an issue when booting the hypervisor after the patch with 
> assertion at the line 64 of iommu_intr.c (in function 
> get_intremap_entry).
> Stack dump:
> ...........
> get_intremap_entry+0x39/0x58
> amd_iommu_read_msi_from_ire+0x74/0xac
> iommu_read_msi_from_ire+0x3c/0x3f
> set_msi_affinity+0x161/0x1ae
> enable_iommu+0x681/0x7d2
> amd_iommu_init+0x50b/0x6b1
> amd_iov_detect+0x69/0xad
> iommu_setup+0x67/0x171
> __start_xen+0x278c/0x2b9d
>
> ************************************
> Panic on CPU 0:
> Assertion '(table != NULL) && (offset < INTREMAP_ENTRIES)' failed at 
> iommu_intr.c:64
> *************************************
>
> Investigation showing table is not null and offset = 0.
Sorry for typo.  The investigation shows that the ASSERT inside the 
get_int_remap_entry failed when bdf = 0x2 (which is the IOMMU), the 
table is NULL.
Suravee
> Suravee
>
>
> On 3/26/2013 3:51 AM, Jan Beulich wrote:
> > 1: IOMMU: allow MSI message to IRTE propagation to fail
> > 2: x86/MSI: cleanup to prepare for multi-vector MSI
> > 3: AMD IOMMU: allocate IRTE entries instead of using a static mapping
> > 4: AMD IOMMU: untie remap and vector maps
> >
> > Note that especially patch 3 is more RFC-like, as I continue to have
> > no way to test this here.
> >
> > Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>


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