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Re: [Xen-devel] [PATCH] Bypass mask bit of msix entry in xen

Jan Beulich wrote:
On 21.03.13 at 11:50, Zhenzhong Duan <zhenzhong.duan@xxxxxxxxxx> wrote:
On 2013-03-21 18:12, Jan Beulich wrote:
Furthermore, without explanation I also don't see how the mask
bit is now being dealt with properly: From an abstract pov you'd
need to merge ("or") the guest-requested mask bit state with what
Xen needs for its own purposes. I don't see anything like that here
or in the qemu side patch.
Right, I didn't consider combine xen's masking with guest's.
My patch just target making irq affinity in old hvm guest work and sometimes no irq handler panic. But I would like to know what's the result if guest's mask setting doesn't pass to device, interrupt loss or something else? I see current implemention didn't passthrough mask bit too.

The effect of this is unknown, as it depends on the particular
driver behavior and assumptions. Loss of interrupts, however,
doesn't appear to be problematic here; instead, interrupts
getting delivered when the driver doesn't expect them seems
to be the much bigger problem.


It's hard to merge guest requested mask with xen's.
Because xen lack a irq_desc.depth as kernel for nested irq disable and enable.

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