Re: [Xen-devel] Xen's per CPU time calibration

[Tim Deegan <tim@xxxxxxx>]

At 12:15 -0700 on 12 Mar (1363090544), Xinxin Jin wrote:
> Hi all,
> 
> I have a question about CPU time calibration. In timer ISR, each physical
> CPU read the platform time to a calibration data structure and then raise
> the TIME_CALIBRATE_SOFTIRQ. Later the physical CPU will do time calibration
> through the softirq handler local_time_calibration() based on the platform
> time it read before. Strictly speaking, this time is NOT the current
> accurate platform time already because there is a latency between read and
> use. So why does it work in this way? Why not directly do calibration in
> timer interrupt?

There are three things going on here:
1. The timer interrupt arrives (on only one CPU).
2. That CPU does a rendezvous with all the others so they can take
   synchronized TSC readings.  This involves a synchronous IPI to
   all CPUs.
3. Each CPU, in a softirq, uses the timestamps from stage 2 to 
   recalibrate its time functions. 

Because the calibration is done with the measurements from #2, and not
from the current TSC count, there's no problem with the latency between
#2 and #3.

I think most of the recalibration code _could_ be done in stage #2, but
there's no need to do it there -- it would just add to the length of
time that interrupts are disabled.

Cheers,

Tim.

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