[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH 2/9] arm: consolidate setup of hypervisor traps and second stage paging
From: Ian Campbell <ian.campbell@xxxxxxxxxx> In particular be sure to initisalise HCR_EL2 on secondary processors. Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx> --- xen/arch/arm/domain_build.c | 7 ------- xen/arch/arm/mm.c | 10 ++++++++++ xen/arch/arm/setup.c | 13 +++---------- xen/arch/arm/smpboot.c | 5 +++-- xen/arch/arm/traps.c | 11 +++++++++++ xen/include/asm-arm/mm.h | 4 +++- xen/include/asm-arm/processor.h | 2 ++ 7 files changed, 32 insertions(+), 20 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index bdf41fa..f161845 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -322,10 +322,6 @@ int construct_dom0(struct domain *d) gic_route_irq_to_guest(d, 46, "lcd"); gic_route_irq_to_guest(d, 47, "eth"); - /* Enable second stage translation */ - WRITE_SYSREG(READ_SYSREG(HCR_EL2) | HCR_VM, HCR_EL2); - isb(); - /* The following loads use the domain's p2m */ p2m_load_VTTBR(d); @@ -373,9 +369,6 @@ int construct_dom0(struct domain *d) } #endif - WRITE_SYSREG(HCR_PTW|HCR_BSU_OUTER|HCR_AMO|HCR_IMO|HCR_VM|HCR_TWI, HCR_EL2); - isb(); - local_abort_enable(); return 0; diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index 9661f10..ba3140d 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -251,6 +251,16 @@ void __init arch_init_memory(void) BUG_ON(IS_ERR(dom_cow)); } +void __cpuinit setup_virt_paging(void) +{ + /* Setup Stage 2 address translation */ + /* SH0=00, ORGN0=IRGN0=01 + * SL0=01 (Level-1) + * T0SZ=(1)1000 = -8 (40 bit physical addresses) + */ + WRITE_SYSREG32(0x80002558, VTCR_EL2); isb(); +} + /* Boot-time pagetable setup. * Changes here may need matching changes in head.S */ void __init setup_pagetables(unsigned long boot_phys_offset, paddr_t xen_paddr) diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index 566f36c..cfe3d94 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -446,16 +446,9 @@ void __init start_xen(unsigned long boot_phys_offset, set_current((struct vcpu *)0xfffff000); /* debug sanity */ idle_vcpu[0] = current; - /* Setup Hyp vector base */ - WRITE_SYSREG((vaddr_t)hyp_traps_vector, VBAR_EL2); - isb(); - - /* Setup Stage 2 address translation */ - /* SH0=00, ORGN0=IRGN0=01 - * SL0=01 (Level-1) - * T0SZ=(1)1000 = -8 (40 bit physical addresses) - */ - WRITE_SYSREG32(0x80002558, VTCR_EL2); isb(); + init_traps(); + + setup_virt_paging(); enable_vfp(); diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index b2af42e..1bebf86 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -148,8 +148,9 @@ void __cpuinit start_secondary(unsigned long boot_phys_offset, *c = boot_cpu_data; identify_cpu(c); - /* Setup Hyp vector base */ - WRITE_SYSREG((vaddr_t)hyp_traps_vector, VBAR_EL2); + init_traps(); + + setup_virt_paging(); mmu_init_secondary_cpu(); enable_vfp(); diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index cf28974..2cc31ab 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -53,6 +53,17 @@ integer_param("debug_stack_lines", debug_stack_lines); #define stack_words_per_line 8 + +void __cpuinit init_traps(void) +{ + /* Setup Hyp vector base */ + WRITE_SYSREG((vaddr_t)hyp_traps_vector, VBAR_EL2); + + /* Setup hypervisor traps */ + WRITE_SYSREG(HCR_PTW|HCR_BSU_OUTER|HCR_AMO|HCR_IMO|HCR_VM|HCR_TWI, HCR_EL2); + isb(); +} + asmlinkage void __div0(void) { printk("Division by zero in hypervisor.\n"); diff --git a/xen/include/asm-arm/mm.h b/xen/include/asm-arm/mm.h index 19e5bc2..4be383e 100644 --- a/xen/include/asm-arm/mm.h +++ b/xen/include/asm-arm/mm.h @@ -138,8 +138,10 @@ extern unsigned long total_pages; /* Boot-time pagetable setup */ extern void setup_pagetables(unsigned long boot_phys_offset, paddr_t xen_paddr); -/* MMU setup for seccondary CPUS (which already have paging enabled) */ +/* MMU setup for secondary CPUS (which already have paging enabled) */ extern void __cpuinit mmu_init_secondary_cpu(void); +/* Second stage paging setup, to be called on all CPUs */ +extern void __cpuinit setup_virt_paging(void); /* Set up the xenheap: up to 1GB of contiguous, always-mapped memory. * Base must be 32MB aligned and size a multiple of 32MB. */ extern void setup_xenheap_mappings(unsigned long base_mfn, unsigned long nr_mfns); diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index 6fbe2fa..1681ebf 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -353,6 +353,8 @@ union hsr { #ifndef __ASSEMBLY__ extern uint32_t hyp_traps_vector[]; +void init_traps(void); + void panic_PAR(uint64_t par); void show_execution_state(struct cpu_user_regs *regs); -- 1.7.10.4 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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