Re: [Xen-devel] [PATCH 2/2] x86/Intel: Add missing Merom, Westmere, and Nehelem models.

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 01.03.13 at 15:31, Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx> wrote:
> Mainly 22 (Merom-L); 30 (Nehelem); and 37, 44 (Westmere).

Assuming Intel confirms this, I'm fine with adding those.

> --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c
> +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c
> @@ -738,14 +738,25 @@ int vmx_vpmu_initialise(struct vcpu *v, unsigned int 
> vpmu_flags)
>      {
>          switch ( cpu_model )
>          {
> +        /* Core2: */
>          case 15: /* original 65 nm celeron/pentium/core2/xeon, 
> "Merom"/"Conroe" */
> +        case 22: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" 
> */
>          case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */
> -        case 26: /* 45 nm nehalem, "Bloomfield" */
>          case 29: /* six-core 45 nm xeon "Dunnington" */
> +
>          case 42: /* SandyBridge */
>          case 45: /* SandyBridge, "Romely-EP" */
> +
> +        /* Nehelem: */

Nehalem

> +        case 26: /* 45 nm nehalem, "Bloomfield" */
> +        case 30: /* 45 nm nehalem, "Lynnfield" */
>          case 46: /* 45 nm nehalem-ex, "Beckton" */
> +
> +        /* Westmere: */
> +        case 37: /* 32 nm nehalem, "Clarkdale" */
> +        case 44: /* 32 nm nehalem, "Gulftown" */
>          case 47: /* 32 nm Xeon E7 */
> +
>          case 58: /* IvyBridge */
>          case 62: /* IvyBridge EP */
>              ret = core2_vpmu_initialise(v, vpmu_flags);

I guess the main reason these weren't here is that no-one actively
tested the code on them. Fujitsu has been completing this list as
they ran into systems missing here yet they were able to test on...

Jan


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