[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Xen-devel] [PATCH 9/9] nested vmx: enable load IA32_PERF_GLOBAL_CTRL feature for L1 VMM



Signed-off-by: Dongxiao Xu <dongxiao.xu@xxxxxxxxx>
---
 xen/arch/x86/hvm/vmx/vvmx.c        |   18 ++++++++++++++----
 xen/include/asm-x86/hvm/vmx/vmcs.h |    6 ++++++
 2 files changed, 20 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
index fad961d..ed47780 100644
--- a/xen/arch/x86/hvm/vmx/vvmx.c
+++ b/xen/arch/x86/hvm/vmx/vvmx.c
@@ -530,7 +530,8 @@ static void nvmx_update_exit_control(struct vcpu *v, 
unsigned long host_cntrl)
     shadow_cntrl = __get_vvmcs(nvcpu->nv_vvmcx, VM_EXIT_CONTROLS);
     shadow_cntrl &= ~(VM_EXIT_SAVE_DEBUG_CNTRLS 
                       | VM_EXIT_LOAD_HOST_PAT
-                      | VM_EXIT_LOAD_HOST_EFER);
+                      | VM_EXIT_LOAD_HOST_EFER
+                      | VM_EXIT_LOAD_PERF_GLOBAL_CTRL);
     shadow_cntrl |= host_cntrl;
     __vmwrite(VM_EXIT_CONTROLS, shadow_cntrl);
 }
@@ -541,7 +542,9 @@ static void nvmx_update_entry_control(struct vcpu *v)
     struct nestedvcpu *nvcpu = &vcpu_nestedhvm(v);
 
     shadow_cntrl = __get_vvmcs(nvcpu->nv_vvmcx, VM_ENTRY_CONTROLS);
-    shadow_cntrl &= ~(VM_ENTRY_LOAD_GUEST_PAT | VM_ENTRY_LOAD_GUEST_EFER);
+    shadow_cntrl &= ~(VM_ENTRY_LOAD_GUEST_PAT
+                      | VM_ENTRY_LOAD_GUEST_EFER
+                      | VM_ENTRY_LOAD_PERF_GLOBAL_CTRL);
     __vmwrite(VM_ENTRY_CONTROLS, shadow_cntrl);
 }
 
@@ -626,6 +629,7 @@ static const u16 vmcs_gstate_field[] = {
     GUEST_IA32_DEBUGCTL,
     GUEST_PAT,
     GUEST_EFER,
+    GUEST_PERF_GLOBAL_CTRL,
     /* 32 BITS */
     GUEST_ES_LIMIT,
     GUEST_CS_LIMIT,
@@ -761,6 +765,8 @@ static void load_shadow_guest_state(struct vcpu *v)
     control = __get_vvmcs(vvmcs, VM_ENTRY_CONTROLS);
     if ( control & VM_ENTRY_LOAD_GUEST_PAT )
         hvm_set_guest_pat(v, __get_vvmcs(vvmcs, GUEST_PAT));
+    if ( control & VM_ENTRY_LOAD_PERF_GLOBAL_CTRL )
+        hvm_msr_write_intercept(MSR_CORE_PERF_GLOBAL_CTRL, __get_vvmcs(vvmcs, 
GUEST_PERF_GLOBAL_CTRL));
 
     hvm_funcs.set_tsc_offset(v, v->arch.hvm_vcpu.cache_tsc_offset);
 
@@ -890,6 +896,8 @@ static void load_vvmcs_host_state(struct vcpu *v)
     control = __get_vvmcs(vvmcs, VM_EXIT_CONTROLS);
     if ( control & VM_EXIT_LOAD_HOST_PAT )
         hvm_set_guest_pat(v, __get_vvmcs(vvmcs, HOST_PAT));
+    if ( control & VM_EXIT_LOAD_PERF_GLOBAL_CTRL )
+        hvm_msr_write_intercept(MSR_CORE_PERF_GLOBAL_CTRL, __get_vvmcs(vvmcs, 
HOST_PERF_GLOBAL_CTRL));
 
     hvm_funcs.set_tsc_offset(v, v->arch.hvm_vcpu.cache_tsc_offset);
 
@@ -1335,7 +1343,8 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 
*msr_content)
                VM_EXIT_SAVE_GUEST_PAT |
                VM_EXIT_LOAD_HOST_PAT |
                VM_EXIT_SAVE_GUEST_EFER |
-               VM_EXIT_LOAD_HOST_EFER;
+               VM_EXIT_LOAD_HOST_EFER |
+               VM_EXIT_LOAD_PERF_GLOBAL_CTRL;
        /* 0-settings */
         data = ((data | tmp) << 32) | tmp;
         break;
@@ -1343,7 +1352,8 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 
*msr_content)
         /* bit 0-8, and 12 must be 1 (refer G5 of SDM) */
         tmp = 0x11ff;
         data = VM_ENTRY_LOAD_GUEST_PAT |
-               VM_ENTRY_LOAD_GUEST_EFER;
+               VM_ENTRY_LOAD_GUEST_EFER |
+               VM_ENTRY_LOAD_PERF_GLOBAL_CTRL;
         data = ((data | tmp) << 32) | tmp;
         break;
 
diff --git a/xen/include/asm-x86/hvm/vmx/vmcs.h 
b/xen/include/asm-x86/hvm/vmx/vmcs.h
index 9665d3a..cc92f69 100644
--- a/xen/include/asm-x86/hvm/vmx/vmcs.h
+++ b/xen/include/asm-x86/hvm/vmx/vmcs.h
@@ -162,6 +162,7 @@ extern u32 vmx_pin_based_exec_control;
 
 #define VM_EXIT_SAVE_DEBUG_CNTRLS       0x00000004
 #define VM_EXIT_IA32E_MODE              0x00000200
+#define VM_EXIT_LOAD_PERF_GLOBAL_CTRL   0x00001000
 #define VM_EXIT_ACK_INTR_ON_EXIT        0x00008000
 #define VM_EXIT_SAVE_GUEST_PAT          0x00040000
 #define VM_EXIT_LOAD_HOST_PAT           0x00080000
@@ -173,6 +174,7 @@ extern u32 vmx_vmexit_control;
 #define VM_ENTRY_IA32E_MODE             0x00000200
 #define VM_ENTRY_SMM                    0x00000400
 #define VM_ENTRY_DEACT_DUAL_MONITOR     0x00000800
+#define VM_ENTRY_LOAD_PERF_GLOBAL_CTRL  0x00002000
 #define VM_ENTRY_LOAD_GUEST_PAT         0x00004000
 #define VM_ENTRY_LOAD_GUEST_EFER        0x00008000
 extern u32 vmx_vmentry_control;
@@ -302,6 +304,8 @@ enum vmcs_field {
     GUEST_PAT_HIGH                  = 0x00002805,
     GUEST_EFER                      = 0x00002806,
     GUEST_EFER_HIGH                 = 0x00002807,
+    GUEST_PERF_GLOBAL_CTRL          = 0x00002808,
+    GUEST_PERF_GLOBAL_CTRL_HIGH     = 0x00002809,
     GUEST_PDPTR0                    = 0x0000280a,
     GUEST_PDPTR0_HIGH               = 0x0000280b,
     GUEST_PDPTR1                    = 0x0000280c,
@@ -314,6 +318,8 @@ enum vmcs_field {
     HOST_PAT_HIGH                   = 0x00002c01,
     HOST_EFER                       = 0x00002c02,
     HOST_EFER_HIGH                  = 0x00002c03,
+    HOST_PERF_GLOBAL_CTRL           = 0x00002c04,
+    HOST_PERF_GLOBAL_CTRL_HIGH      = 0x00002c05,
     PIN_BASED_VM_EXEC_CONTROL       = 0x00004000,
     CPU_BASED_VM_EXEC_CONTROL       = 0x00004002,
     EXCEPTION_BITMAP                = 0x00004004,
-- 
1.7.1


_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxx
http://lists.xen.org/xen-devel


 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.