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[Xen-devel] [PATCH 5/7] xen/arm: wake up secondary cpus



Secondary cpus are held by the firmware until we send an IPI to them.

Changes in v2:
- use preprocessor definitions in kick_cpus;
- do not manually increment the base address register, use an offset
instead;
- move kick_cpus to proc-ca15.S.

Signed-off-by: Stefano Stabellini <stefano.stabellini@xxxxxxxxxxxxx>
---
 xen/arch/arm/gic.h                      |    2 ++
 xen/arch/arm/head.S                     |    8 ++++++--
 xen/arch/arm/mode_switch.S              |   28 ++++++++++++++++++++++++++++
 xen/include/asm-arm/platform_vexpress.h |   17 +++++++++++++++++
 4 files changed, 53 insertions(+), 2 deletions(-)
 create mode 100644 xen/include/asm-arm/platform_vexpress.h

diff --git a/xen/arch/arm/gic.h b/xen/arch/arm/gic.h
index b8f9f201..b2e1d7f 100644
--- a/xen/arch/arm/gic.h
+++ b/xen/arch/arm/gic.h
@@ -124,6 +124,7 @@
 /* XXX: write this into the DT */
 #define VGIC_IRQ_EVTCHN_CALLBACK 31
 
+#ifndef __ASSEMBLY__
 extern int domain_vgic_init(struct domain *d);
 extern void domain_vgic_free(struct domain *d);
 
@@ -158,6 +159,7 @@ extern int gicv_setup(struct domain *d);
 extern void gic_save_state(struct vcpu *v);
 extern void gic_restore_state(struct vcpu *v);
 
+#endif /* __ASSEMBLY__ */
 #endif
 
 /*
diff --git a/xen/arch/arm/head.S b/xen/arch/arm/head.S
index 25993d6..3fe6412 100644
--- a/xen/arch/arm/head.S
+++ b/xen/arch/arm/head.S
@@ -80,12 +80,12 @@ start:
        beq   boot_cpu               /* If we're CPU 0, boot now */
 
        /* Non-boot CPUs wait here to be woken up one at a time. */
-1:     wfe
-       dsb
+1:     dsb
        ldr   r0, =smp_up_cpu        /* VA of gate */
        add   r0, r0, r10            /* PA of gate */
        ldr   r1, [r0]               /* Which CPU is being booted? */
        teq   r1, r12                /* Is it us? */
+       wfene
        bne   1b
 
 boot_cpu:
@@ -99,6 +99,10 @@ boot_cpu:
        PRINT(" booting -\r\n")
 #endif
 
+       /* Wake up secondary cpus */
+       teq   r12, #0
+       bleq  kick_cpus
+
        /* Check that this CPU has Hyp mode */
        mrc   CP32(r0, ID_PFR1)
        and   r0, r0, #0xf000        /* Bits 12-15 define virt extensions */
diff --git a/xen/arch/arm/mode_switch.S b/xen/arch/arm/mode_switch.S
index 83a682b..7ff2f9e 100644
--- a/xen/arch/arm/mode_switch.S
+++ b/xen/arch/arm/mode_switch.S
@@ -19,7 +19,35 @@
 
 #include <asm/config.h>
 #include <asm/page.h>
+#include <asm/platform_vexpress.h>
 #include <asm/asm_defns.h>
+#include "gic.h"
+
+
+/* XXX: Versatile Express specific code */
+/* wake up secondary cpus */
+.globl kick_cpus
+kick_cpus:
+    /* write start paddr to v2m sysreg FLAGSSET register */
+       ldr   r0, =(V2M_SYS_MMIO_BASE)        /* base V2M sysreg MMIO address */
+       dsb
+       mov   r2, #0xffffffff
+       str   r2, [r0, #(V2M_SYS_FLAGSCLR)]
+       dsb
+       ldr   r2, =start
+       add   r2, r2, r10
+       str   r2, [r0, #(V2M_SYS_FLAGSSET)]
+       dsb
+       /* send an interrupt */
+       ldr   r0, =(GIC_BASE_ADDRESS + GIC_DR_OFFSET) /* base GICD MMIO address 
*/
+       mov   r2, #0x1
+       str   r2, [r0, #(GICD_CTLR * 4)]      /* enable distributor */
+       mov   r2, #0xfe0000
+       str   r2, [r0, #(GICD_SGIR * 4)]      /* send IPI to everybody */
+       dsb
+       str   r2, [r0, #(GICD_CTLR * 4)]      /* disable distributor */
+       mov   pc, lr
+
 
 /* Get up a CPU into Hyp mode.  Clobbers r0-r3.
  *
diff --git a/xen/include/asm-arm/platform_vexpress.h 
b/xen/include/asm-arm/platform_vexpress.h
new file mode 100644
index 0000000..3556af3
--- /dev/null
+++ b/xen/include/asm-arm/platform_vexpress.h
@@ -0,0 +1,17 @@
+#ifndef __ASM_ARM_PLATFORM_H
+#define __ASM_ARM_PLATFORM_H
+
+/* V2M */
+#define V2M_SYS_MMIO_BASE     (0x1c010000)
+#define V2M_SYS_FLAGSSET      (0x30)
+#define V2M_SYS_FLAGSCLR      (0x34)
+
+#endif /* __ASM_ARM_PLATFORM_H */
+/*
+ * Local variables:
+ * mode: C
+ * c-set-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
1.7.2.5


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