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Re: [Xen-devel] [PATCH] x86/emul: only emulate possibly operand sizes for POPA

  • To: Jan Beulich <JBeulich@xxxxxxxx>
  • From: Keir Fraser <keir@xxxxxxx>
  • Date: Thu, 08 Nov 2012 09:08:34 +0000
  • Cc: xen-devel <xen-devel@xxxxxxxxxxxxx>
  • Delivery-date: Thu, 08 Nov 2012 09:08:59 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xen.org>
  • Thread-index: Ac29kKEjZirPQ1mIOEuOmgIBKueZCA==
  • Thread-topic: [Xen-devel] [PATCH] x86/emul: only emulate possibly operand sizes for POPA

On 08/11/2012 08:34, "Jan Beulich" <JBeulich@xxxxxxxx> wrote:

>> I did wonder. The top halves of 64b registers are not used in compatibility
>> mode. Are their contents at all guaranteed to be
>> maintained/updated/preserved in any meaningful way across transitions into
>> and out of compatibility mode? I wasn't aware they were, and in that case
>> the cast and comment are indeed pointless.
> There's no architectural guarantee, but that's how CPUs work.
> The important aspect (from an information leak perspective) is
> that upper halves don't get zeroed explicitly when switching
> between compatibility and 64-bit modes.
> Now we can of course utilize that read_ulong() already does the
> zero extension (but if it didn't, we would leak stack contents here,
> so it may still be worth a comment), to the net effect of

The concern over information leak is fair. Just leave the code line as-is
then with the explicit cast and end-of-line comment.


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