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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH 01/16] arm: Zero the BSS at start of day.
Avoids surprises e.g. when loading via the boot-wrapper.
Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
---
xen/arch/arm/head.S | 20 +++++++++++++++++++-
xen/arch/arm/xen.lds.S | 1 +
2 files changed, 20 insertions(+), 1 deletions(-)
diff --git a/xen/arch/arm/head.S b/xen/arch/arm/head.S
index cdbe011..131cdf9 100644
--- a/xen/arch/arm/head.S
+++ b/xen/arch/arm/head.S
@@ -127,8 +127,26 @@ boot_cpu:
add pc, r0, r10 /* Call PA of function */
hyp:
- PRINT("- Setting up control registers -\r\n")
+ /* Zero BSS On the boot CPU to avoid nasty surprises */
+ teq r12, #0
+ bne skip_bss
+
+ PRINT("- Zero BSS -\r\n")
+ ldr r0, =__bss_start /* Load start & end of bss */
+ ldr r1, =__bss_end
+ add r0, r0, r10 /* Apply physical offset */
+ add r1, r1, r10
+
+ mov r2, #0
+1: str r2, [r0], #4
+ cmp r0, r1
+ blo 1b
+
+skip_bss:
+
+ PRINT("- Setting up control registers -\r\n")
+
/* Set up memory attribute type tables */
ldr r0, =MAIR0VAL
ldr r1, =MAIR1VAL
diff --git a/xen/arch/arm/xen.lds.S b/xen/arch/arm/xen.lds.S
index 4a9d086..410d7db 100644
--- a/xen/arch/arm/xen.lds.S
+++ b/xen/arch/arm/xen.lds.S
@@ -119,6 +119,7 @@ SECTIONS
*(.bss.percpu.read_mostly)
. = ALIGN(SMP_CACHE_BYTES);
__per_cpu_data_end = .;
+ __bss_end = .;
} :text
_end = . ;
--
1.7.9.1
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