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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH 0/4] arm: SMP interrupt handling fixes
With the following series I now successfully boot to a dom0 prompt on a
4 way FastModel.
The most important one is not disabling the GICD on all CPUs, although I
suspect the per-CPU irq_desc thing is pretty important too. The other
two are just incidental things I happened to find while investigating.
arm: disable distributor delivery on boot CPU only
arm: don't bother setting up vtimer, vgic etc on idle CPUs
arm/vtimer: convert result to ticks when reading CNTPCT register
arm: Use per-CPU irq_desc for PPIs and SGIs
Ian.
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