[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH 11/38] arm: implement p2m lookup
On Thu, 2012-06-07 at 10:03 +0100, Tim Deegan wrote: > At 15:39 +0000 on 01 Jun (1338565180), Ian Campbell wrote: > > +/* > > + * Lookup the MFN corresponding to a domain's PFN. > > + * > > + * There are no processor functions to do a stage 2 only lookup therefore > > we > > + * do a a software walk. > > + */ > > +paddr_t p2m_lookup(struct domain *d, paddr_t paddr) > > +{ > > + struct p2m_domain *p2m = &d->arch.p2m; > > + lpae_t pte, *first = NULL, *second = NULL, *third = NULL; > > + paddr_t maddr = INVALID_PADDR; > > + > > + spin_lock(&p2m->lock); > > + > > + first = __map_domain_page(p2m->first_level); > > + if ( !first[first_table_offset(paddr)].p2m.valid ) > > + goto done_err; > > + if ( !first[first_table_offset(paddr)].p2m.table ) > > + { > > + pte = first[first_table_offset(paddr)]; > > + goto done; > > + } > > This would be neater as: > pte = first[first_table_offset(paddr)]; > if ( !pte.p2m.valid || !pte.p2m.table ) > goto done; > > and test for pte.valid at 'done'. Yes, that looks nice, although you still need a bit of a quirk for the third level table bit. Patch below. > It would be nice to do the three levels in a loop as well, but the weird > way the table bit behaves in third-level entries might make that more > confusing than the straight-line version. This also has the same issue as with *_table_offset as the other similar functions discussed earlier. 8<----------------------------------------------------------- >From 347855d863303720cbf5ceb0f1e067660108d3f1 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ian.campbell@xxxxxxxxxx> Date: Fri, 13 Apr 2012 16:24:58 +0100 Subject: [PATCH] arm: implement p2m lookup Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx> --- xen/arch/arm/p2m.c | 45 +++++++++++++++++++++++++++++++++++++++++++++ xen/include/asm-arm/p2m.h | 3 +++ 2 files changed, 48 insertions(+), 0 deletions(-) diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index 6df5b62..145d9fe 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -32,6 +32,51 @@ void p2m_load_VTTBR(struct domain *d) isb(); /* Ensure update is visible */ } +/* + * Lookup the MFN corresponding to a domain's PFN. + * + * There are no processor functions to do a stage 2 only lookup therefore we + * do a a software walk. + */ +paddr_t p2m_lookup(struct domain *d, paddr_t paddr) +{ + struct p2m_domain *p2m = &d->arch.p2m; + lpae_t pte, *first = NULL, *second = NULL, *third = NULL; + paddr_t maddr = INVALID_PADDR; + + spin_lock(&p2m->lock); + + first = __map_domain_page(p2m->first_level); + + pte = first[first_table_offset(paddr)]; + if ( !pte.p2m.valid || !pte.p2m.table ) + goto done; + + second = map_domain_page(first[first_table_offset(paddr)].p2m.base); + pte = second[second_table_offset(paddr)]; + if ( !pte.p2m.valid || !pte.p2m.table ) + goto done; + + third = map_domain_page(second[second_table_offset(paddr)].p2m.base); + pte = third[third_table_offset(paddr)]; + + /* This bit must be one in the level 3 entry */ + if ( !pte.p2m.table ) + pte.bits = 0; + +done: + if ( pte.p2m.valid ) + maddr = (pte.bits & PADDR_MASK & PAGE_MASK) | (paddr & ~PAGE_MASK); + + if (third) unmap_domain_page(third); + if (second) unmap_domain_page(second); + if (first) unmap_domain_page(first); + + spin_unlock(&p2m->lock); + + return maddr; +} + int guest_physmap_mark_populate_on_demand(struct domain *d, unsigned long gfn, unsigned int order) diff --git a/xen/include/asm-arm/p2m.h b/xen/include/asm-arm/p2m.h index 349923a..1afd5cb 100644 --- a/xen/include/asm-arm/p2m.h +++ b/xen/include/asm-arm/p2m.h @@ -32,6 +32,9 @@ int p2m_alloc_table(struct domain *d); /* */ void p2m_load_VTTBR(struct domain *d); +/* */ +paddr_t p2m_lookup(struct domain *d, paddr_t gpfn); + /* Setup p2m RAM mapping for domain d from start-end. */ int p2m_populate_ram(struct domain *d, paddr_t start, paddr_t end); /* Map MMIO regions in the p2m: start_gaddr and end_gaddr is the range -- 1.7.9.1 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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