Re: [Xen-devel] [PATCH 3 of 6] arm: avoid memory write in switch to Hyp mode

[Ian Campbell <Ian.Campbell@xxxxxxxxxx>]

On Thu, 2012-05-31 at 17:40 +0100, Tim Deegan wrote:
> # HG changeset patch
> # User Tim Deegan <tim@xxxxxxx>
> # Date 1338482127 -3600
> # Node ID 8656509f24ea8b17d1c2dabd67c710662f66d17f
> # Parent  05447f395c91029fb732142e36788cfa92374045
> arm: avoid memory write in switch to Hyp mode.
> 
> Assemble the new CPSR in registers instead.  It's slightly cleaner,
> And makes it possible to have a read-only text section.
> 
> Signed-off-by: Tim Deegan <tim@xxxxxxx>
> 
> diff -r 05447f395c91 -r 8656509f24ea xen/arch/arm/mode_switch.S
> --- a/xen/arch/arm/mode_switch.S      Thu May 31 17:35:27 2012 +0100
> +++ b/xen/arch/arm/mode_switch.S      Thu May 31 17:35:27 2012 +0100
> @@ -66,11 +66,7 @@ enter_hyp_mode:
>       mcr   CP32(r0, FCSEIDR)
>       mcr   CP32(r0, CONTEXTIDR)
>       /* FIXME: ought to reset some other NS control regs here */
> -     adr   r1, 1f                 /* Store return address */
> -     str   r3, [r1]               /* where we can use it for RFE */
> -     isb                          /* Ensure we see the stored address */
> -     rfeia r1                     /* Enter Hyp mode */
> -
> -1:   .word 0                      /* PC to enter Hyp mode at */
> -     .word 0x000001da             /* CPSR: LE, Abort/IRQ/FIQ off, Hyp */
> -
> +     mrs   r0, cpsr               /* Copy the CPSR */
> +     add   r0, r0, #0x4           /* 0x16 (Monitor) -> 0x1a (Hyp) */
> +     msr   spsr_cxsf, r0          /* into the SPSR */

Not that it matters much but I think this could have been sprs_c to just
update spsr[0:7] (which is all you wanted to touch). In fact I reckon
you could have just done:
        mov r0, #0x1a|SPSR_I|SPSR_F
        msr spsr_c, r0

Anyway, I'm going to apply regardless because I'm just nitpicking...

> +     movs  pc, r3                 /* Exception-return into Hyp mode */



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