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[Xen-devel] [PATCH 0 of 2] V2 vpmu: Add Intel BTS functionality

  • To: "xen-devel@xxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxx>
  • From: Dietmar Hahn <dietmar.hahn@xxxxxxxxxxxxxx>
  • Date: Wed, 07 Mar 2012 14:12:30 +0100
  • Delivery-date: Wed, 07 Mar 2012 13:13:15 +0000
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this is the 2nd version of the patches.

These 2 patches add BTS (Branch Trace Store) functionality of Intel Core2
cpus to the vpmu.

This feature gets switched on if the cpu is generally supported from the vpmu,
if the cpu supports the DS (Debug Store) bit in the cpuid.eax[0x1].edx[21]
and if BTS is supported in the MSR_IA32_MISC_ENABLE.
If the cpu supports CPL-qualified BTS in the cpuid, this is also supported

The interface of the struct arch_vpmu_ops was extended with a new function
pointer do_cpuid. The function gets called in vmx_cpuid_intercept() allowing
the vpmu handling to switch on the DS bit in the guest.

Changes in version 2:

As Jan Beulich suggested:
- the vpmu boot flag is now a string variable. Usage:
  - without vpmu: no vPMU supported
  - only vpmu:    behaviour like today, using performance counter in HVM guests
  - vpmu=bts:     + using BTS feature on Intel cpus if supported
- If emulation of BTS is switched on, a big fat warning is printed on the
  console when the guest gets started.


 xen/arch/x86/hvm/vmx/vmx.c               |    2 +
 xen/arch/x86/hvm/vmx/vpmu_core2.c        |    7 +
 xen/arch/x86/hvm/vpmu.c                  |   10 +
 xen/include/asm-x86/hvm/vpmu.h           |    5 +
 xen/arch/x86/hvm/svm/vpmu.c              |    9 +-
 xen/arch/x86/hvm/vmx/vmx.c               |   12 +-
 xen/arch/x86/hvm/vmx/vpmu_core2.c        |  181 +++++++++++++++++++++++++-----
 xen/arch/x86/hvm/vpmu.c                  |   37 +++++-
 xen/include/asm-x86/hvm/vmx/vpmu_core2.h |    1 +
 xen/include/asm-x86/hvm/vpmu.h           |   16 ++-
 xen/include/asm-x86/msr-index.h          |    5 +
 11 files changed, 240 insertions(+), 45 deletions(-)

Company details: http://ts.fujitsu.com/imprint.html

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