[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] RE: [PATCH] X86 MCE: Add SRAR handler
> > Concern 1: for SRAR IFU error, since RIPV=EIPV=0, it maybe an async error > > which occur at guest but root from hypervisor. > > [Jinsong]: > > Yes, but EIPV didn't tell us where the error root from (it's just a > > hint, warning us async possibility). > > It no need to overkill xen at mce isr, instead, at mce softirq we can > > find out error root location and then handle accordingly: > > * at mce isr: > > /* a total insurance */ > > /* if error is async, we delay handle it at mce softirq */ > > if ( !(gstatus & MCG_STATUS_RIPV) && !guest_mode(regs)) > > return -1; > > I continue to think that guest_mode() must not be used without > EIPV, no matter what the purpose of the use. Jan, as explained before, this is purely a sanity check to make sure we can go to next level error handling, and the check for guest_mode have nothing to do with where the error happen, but just make sure that if the context in the stack is for hypervisor mode, and RIPV told us that we can't switch context, then we can't do anything more but just panic since it's complexity to pre-emption/ context switch in hypervisor mode. Thanks --jyh Attachment:
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