[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH 6/6] eliminate remaining uses of struct irq_cfg
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -2279,7 +2279,6 @@ int ioapic_guest_write(unsigned long phy int apic, pin, irq, ret, vector, pirq; struct IO_APIC_route_entry rte = { 0 }; unsigned long flags; - struct irq_cfg *cfg; struct irq_desc *desc; if ( (apic = ioapic_physbase_to_id(physbase)) < 0 ) @@ -2321,7 +2320,6 @@ int ioapic_guest_write(unsigned long phy return irq; desc = irq_to_desc(irq); - cfg = &desc->arch; /* * Since PHYSDEVOP_alloc_irq_vector is dummy, rte.vector is the pirq @@ -2338,7 +2336,7 @@ int ioapic_guest_write(unsigned long phy spin_lock_irqsave(&ioapic_lock, flags); ret = io_apic_read(apic, 0x10 + 2 * pin); spin_unlock_irqrestore(&ioapic_lock, flags); - rte.vector = cfg->vector; + rte.vector = desc->arch.vector; if ( *(u32*)&rte != ret ) WARN_BOGUS_WRITE("old_entry=%08x pirq=%d\n%s: " "Attempt to modify IO-APIC pin for in-use IRQ!\n", @@ -2346,7 +2344,7 @@ int ioapic_guest_write(unsigned long phy return 0; } - if ( cfg->vector <= 0 || cfg->vector > LAST_DYNAMIC_VECTOR ) { + if ( desc->arch.vector <= 0 || desc->arch.vector > LAST_DYNAMIC_VECTOR ) { vector = assign_irq_vector(irq); if ( vector < 0 ) return vector; @@ -2370,7 +2368,7 @@ int ioapic_guest_write(unsigned long phy /* Mask iff level triggered. */ rte.mask = rte.trigger; /* Set the vector field to the real vector! */ - rte.vector = cfg->vector; + rte.vector = desc->arch.vector; SET_DEST(rte.dest.dest32, rte.dest.logical.logical_dest, cpu_mask_to_apicid(desc->arch.cpu_mask)); --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -285,16 +285,14 @@ void destroy_irq(unsigned int irq) int irq_to_vector(int irq) { int vector = -1; - struct irq_cfg *cfg; BUG_ON(irq >= nr_irqs || irq < 0); if (IO_APIC_IRQ(irq)) vector = irq_vector[irq]; - else if(MSI_IRQ(irq)) { - cfg = irq_cfg(irq); - vector = cfg->vector; - } else + else if (MSI_IRQ(irq)) + vector = irq_to_desc(irq)->arch.vector; + else vector = LEGACY_VECTOR(irq); return vector; --- a/xen/include/asm-ia64/linux-xen/asm/irq.h +++ b/xen/include/asm-ia64/linux-xen/asm/irq.h @@ -15,8 +15,7 @@ #define NR_IRQS 256 #ifdef XEN -struct irq_cfg { -#define arch_irq_desc irq_cfg +struct arch_irq_desc { int vector; cpumask_var_t cpu_mask; }; @@ -63,9 +62,6 @@ extern int request_irq_vector(unsigned i #define create_irq(x) assign_irq_vector(AUTO_ASSIGN_IRQ) #define destroy_irq(x) free_irq_vector(x) -#define irq_cfg(x) (&irq_desc[x].arch) -#define irq_to_desc(x) (&irq_desc[x] - #define irq_complete_move(x) do {} \ while(!x) --- a/xen/include/asm-x86/irq.h +++ b/xen/include/asm-x86/irq.h @@ -20,17 +20,13 @@ #define LEGACY_VECTOR(irq) ((irq) + FIRST_LEGACY_VECTOR) -#define irq_to_desc(irq) (&irq_desc[irq]) -#define irq_cfg(irq) (&irq_desc[irq].arch) - typedef struct { DECLARE_BITMAP(_bits,NR_VECTORS); } vmask_t; struct irq_desc; -struct irq_cfg { -#define arch_irq_desc irq_cfg +struct arch_irq_desc { s16 vector; /* vector itself is only 8 bits, */ s16 old_vector; /* but we use -1 for unassigned */ cpumask_var_t cpu_mask; @@ -42,7 +38,7 @@ struct irq_cfg { s8 used; }; -/* For use with irq_cfg.used */ +/* For use with irq_desc.arch.used */ #define IRQ_UNUSED (0) #define IRQ_USED (1) #define IRQ_RESERVED (-1) --- a/xen/include/xen/irq.h +++ b/xen/include/xen/irq.h @@ -84,6 +84,8 @@ typedef struct irq_desc { struct list_head rl_link; } __cacheline_aligned irq_desc_t; +#define irq_to_desc(irq) (&irq_desc[irq]) + int init_one_irq_desc(struct irq_desc *); int arch_init_one_irq_desc(struct irq_desc *); Attachment:
eliminate-irq_cfg.patch _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel
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