Re: [Xen-devel] Re: [PATCH 2 of 5] amd iommu: Fix iommu page size encoding when page order > 0

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 03.11.11 at 14:29, Wei Wang2 <wei.wang2@xxxxxxx> wrote:
> On Thursday 03 November 2011 13:52:18 Jan Beulich wrote:
>> >>> On 03.11.11 at 13:49, "Jan Beulich" <JBeulich@xxxxxxxx> wrote:
>> >>>> On 03.11.11 at 11:13, Wei Wang <wei.wang2@xxxxxxx> wrote:
>> >> diff -r d422e3cf7976 -r d0c38cb215cd
>> >> xen/include/asm-x86/hvm/svm/amd-iommu-defs.h ---
>> >> a/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h    Thu Nov 03 11:02:17 2011
>> >> +0100 +++ b/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h  Thu Nov 03
>> >> 11:03:37 2011 +0100
>> >> @@ -407,4 +407,6 @@
>> >>  #define INT_REMAP_ENTRY_VECTOR_MASK     0x00FF0000
>> >>  #define INT_REMAP_ENTRY_VECTOR_SHIFT    16
>> >>
>> >> +#define INV_IOMMU_ALL_PAGES_ADDRESS      0x7FFFFFFFFFFFFFFFULL
>> >> +
>>
>> Oh, additionally, this still isn't being expressed by a shift expression,
>> which makes it still badly readable (one has to count F-s in order to
>> know what this actually represents).
> Well, this is a copy from the spec.. How about using  (1<<63) -1?

Yes, that's what I asked for. Ideally with 63 also given a meaningful
#define (matchable to the spec).

Jan


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