These are used during bootup and (emergency) shutdown only, and their
only purpose is to get the actual IO-APIC's RTE(s) cleared.
Consequently, only the "raw" accessors should be used (and the ones
going through interrupt remapping code can be skipped), with the
exception of determining the delivery mode: This one must always go
through the interrupt remapping path, as in the VT-d case the actual
IO-APIC's RTE will have the delivery mode always set to zero (which
before possibly could have resulted in such an entry getting cleared
in the "raw" pass, though I haven't observed this case in practice).

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxxxx>

--- a/xen/arch/x86/io_apic.c
+++ b/xen/arch/x86/io_apic.c
@@ -372,14 +372,12 @@ static void eoi_IO_APIC_irq(unsigned int
     spin_unlock_irqrestore(&ioapic_lock, flags);
 }
 
-#define clear_IO_APIC_pin(a,p)     __clear_IO_APIC_pin(a,p,0)
-#define clear_IO_APIC_pin_raw(a,p) __clear_IO_APIC_pin(a,p,1)
-static void __clear_IO_APIC_pin(unsigned int apic, unsigned int pin, int raw)
+static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)
 {
     struct IO_APIC_route_entry entry;
 
     /* Check delivery_mode to be sure we're not clearing an SMI pin */
-    entry = ioapic_read_entry(apic, pin, raw);
+    entry = __ioapic_read_entry(apic, pin, FALSE);
     if (entry.delivery_mode == dest_SMI)
         return;
 
@@ -388,7 +386,7 @@ static void __clear_IO_APIC_pin(unsigned
      */
     memset(&entry, 0, sizeof(entry));
     entry.mask = 1;
-    ioapic_write_entry(apic, pin, raw, entry);
+    __ioapic_write_entry(apic, pin, TRUE, entry);
 }
 
 static void clear_IO_APIC (void)
@@ -396,10 +394,8 @@ static void clear_IO_APIC (void)
     int apic, pin;
 
     for (apic = 0; apic < nr_ioapics; apic++) {
-        for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) {
+        for (pin = 0; pin < nr_ioapic_registers[apic]; pin++)
             clear_IO_APIC_pin(apic, pin);
-            clear_IO_APIC_pin_raw(apic, pin);
-        }
     }
 }