[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH] X86: cpuid faulting feature enable
On 01/07/2011 18:48, "Liu, Jinsong" <jinsong.liu@xxxxxxxxx> wrote: >> Down to a particular stepping? That surely doesn't make sense for >> anything but your own experimenting. > > Yes, it's some ugly. > Currently cpuid faulting is not a architecturally commited feature, and, some > other Intel processors (which do not has cpuid faulting feature) also has > 0xceh MSR. > Hence I use current way for safe. However, I marked it as FIXME to update in > the future accordingly. But Intel's own supporting document states that bit 31 of the PLATFORM_INFO MSR should be sufficient to identify the cpuid faulting feature. Do you really need the stepping check as well? Could you just do a rdmsr_safe read-and-check of PLATFORM_INFO_MSR[31] instead? It would be okay for other Intel CPUs to have MSR 0xce, so long as they don't set bit 31... -- Keir _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel
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