Re: [Xen-devel] Re: VT-d on Asus P7P55D-Evo: IOMMU not supported

[Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx>]

On Thu, Apr 01, 2010 at 08:50:24AM +0300, Pasi Kärkkäinen wrote:
> On Thu, Apr 01, 2010 at 12:29:03AM +0200, Christian Tramnitz wrote:
> > 31.03.2010 22:51, Mark Hurenkamp wrote:
> > > Asus doesn't seem to pay much attention to VT-d issues with their P55
> > > boards, i couldn't find any indication that they are working on it.
> > > I tried to submit a tech support question, but it requires a serial 
> > > number,
> > > which i seem to be unable to locate on the board.
> > 
> > Even if you find the serial and open the support case there will be no
> > meaningful answer just "Linux is not supported". Been there, done that....
> > 
> 
> Please see here: 
> http://wiki.xensource.com/xenwiki/XenPCIpassthrough
> 
> Especially this: 
> "Intel developers also want to know about broken IOMMU/VT-d BIOS 
> implementations, see this email: 
> http://lists.xensource.com/archives/html/xen-devel/2010-01/msg00841.html, so 
> let them know all the details about your hardware and software if you have 
> broken BIOS. "

This just got posted on LKML that might shed the light on why certain
motherboards have VT-d working i7 but not with i5 CPUs:

(https://lists.linux-foundation.org/pipermail/iommu/2010-April/002268.html):
"
When using iommu_domain_alloc with the Intel iommu, the domain address width 
is always initialized to 48 bits (agaw 2).  This domain->agaw value is then 
used by pfn_to_dma_pte to (always) build a 4 level page table.  However, not 
all systems support iommu width of 48 or 4 level page tables.  In particular, 
the Core i5-660 and i5-670 support an address width of 36 bits (not 39!), an 
agaw of only 1, and only 3 level page tables.

My patch delays the domain initialization until the first iommu_attach_device,
...

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