[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH 3/3] dom0 linux: Support 64 bit PREF base/limit.
This patch add suporting 64 bit PREF base/limit. Thanks, -- Yuji Shimada Signed-off-by: Yuji Shimada <shimada-yxb@xxxxxxxxxxxxxxx> diff -r f0f7aa8b1367 drivers/pci/setup-bus.c --- a/drivers/pci/setup-bus.c Fri Nov 28 11:50:04 2008 +0900 +++ b/drivers/pci/setup-bus.c Fri Nov 28 15:56:02 2008 +0900 @@ -150,6 +150,7 @@ pci_setup_bridge(struct pci_bus *bus) struct pci_dev *bridge = bus->self; struct pci_bus_region region; u32 l, io_upper16; + u32 base_up32, limit_up32; DBG(KERN_INFO "PCI: Bridge: %s\n", pci_name(bridge)); @@ -203,17 +204,23 @@ pci_setup_bridge(struct pci_bus *bus) if (bus->resource[2]->flags & IORESOURCE_PREFETCH) { l = (region.start >> 16) & 0xfff0; l |= region.end & 0xfff00000; - DBG(KERN_INFO " PREFETCH window: %08lx-%08lx\n", - region.start, region.end); + DBG(KERN_INFO " PREFETCH window: %llx-%llx\n", + (unsigned long long)region.start, + (unsigned long long)region.end); + base_up32 = (region.start >> 32) & 0xffffffff; + limit_up32 = (region.end >> 32) & 0xffffffff; } else { l = 0x0000fff0; + base_up32 = 0xffffffff; + limit_up32 = 0; DBG(KERN_INFO " PREFETCH window: disabled.\n"); } pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l); - /* Clear out the upper 32 bits of PREF base. */ - pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, 0); + /* Set up the upper 32 bits of PREF base/limit. */ + pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, base_up32); + pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, limit_up32); pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl); } _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel
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