RE: [Xen-devel] [PATCH] Improve the current FLR logic

["Cui, Dexuan" <dexuan.cui@xxxxxxxxx>]

Yuji Shimada wrote:
> On Thu, 24 Jul 2008 18:19:24 +0800
> "Cui, Dexuan" <dexuan.cui@xxxxxxxxx> wrote:
>> It sounds good. Namely, we need to save/restore the following
>> registers for now: 
>> 
>>     - Base Address Registers
>>     - Cache-line size Register
>>     - Latency timer Register
>>     - Enable SERR Bit/Enable PERR Bit in Device Control Register
>>     - Uncorrectable Error Mask Register
>>     - Uncorrectable Error Severity Register
>>     - Correctable Error Mask Register
>>     - Advanced Error Capabilities and Control Register
>>     - Device Control Register
>>     - Link Control Register
>>     - Secondary Uncorrectable Error Severity Register
>>     - Secondary Uncorrectable Error Mask Register
>>     - Device Control 2 Register
>>     - Link Control 2 Register
>>     - The following resister should be configured to "0".
>>           - PME Enable Bit/PME Status Bit in PCI Power Management
>>             Control/Status Register
>> 
>> However, I think maybe the modification is not small enough because
>> 1) we need to save each registers one by one using Python script in
>> xend, and later restore each registers respectively one by one;
>> 2) we should handle bridge in some cases, so we need to distinguish
>> bridges from regular devices since the register layouts are
>> different; 3) Some of the registers you listed are inside the
>> extended PCIe space, so we need detect if a device/bride has the
>> PCIe capability? And find each capability/save the register;
>> 4) xend uses the sys filesystem to access the registers. For the
>> case of PCIe registers, when Dom0 is configured with/without PCIe
>> support (by default, it's "without" now), we should detect and treat
>> it differently? 
>> 
>> Acutually looks the save/restore-all-the-256-byte idea (which was in
>> hypervisor and is in xend now) works very well for quite a long time,
>> and no actual issue is reported as far as I know. Since it looks very
>> difficult to do things perfectly for now and we'll improve them by
>> changing pciback in the long run, maybe keeping the current simple
>> method is acceptable? :-)
> 
> Hi Cui,
> I find that the modification is not small enough. If we improve them,
> it won't be on time for 3.3. So we have no choice but to accept the
> current method.
> 
> The registers other than above-mentioned should be reset. Because
> guest software may configure the registers incorrect values.
> My idea has a effect in abnormal case only, and it won't occur when
> guest software works well. So I think nobody reports about it so far.
> 
> I hope pciback will have better saving/restoring method in 3.4.
> 
Hi Yuji,
I agree. Thanks for all the comments!

Thanks,
-- Dexuan

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