[Xen-devel] [PATCH][Retry 1] 2/4: cpufreq/PowerNow! in Xen: MSR access

["Mark Langsdorf" <mark.langsdorf@xxxxxxx>]

Enable cpufreq support in Xen for AMD Operton processors by:

1) Allowing the PowerNow! driver in dom0 to write to the PowerNow!
MSRs.
2) Adding the cpufreq notifier chain to time-xen.c in dom0.
On a frequency change, a platform hypercall is performed to
scale the frequency multiplier in the hypervisor.
3) Adding a platform hypercall to the hypervisor the scale
the frequency multiplier and reset the time stamps so that
next calibration remains reasonably correct.
4) Adding the cpufreq Xen option which pins the VCPUs to
the physical CPU cores.

Patch 1 covers the frequency scaling platform call in Xen.
Patch 2 allows MSR accesses from the PowerNow! driver.
Patch 3 covers the frequency scaling platform call in Linux.
Patch 4 covers the changes necessary to the PowerNow! driver
to make it correctly associate shared cores under Xen.

This code can be readily expanded to cover Intel or other
non-AMD processors by modifying xen/arch/x8/traps.c to
allow the appropriate MSR accesses.

Caveat: currently, this code does not support the in-kernel
ondemand cpufreq governor.  Dom0 must run a userspace 
daemon to monitor the utilization of the physical cpus
with the getcpuinfo sysctl hypercall.

Caveat 2: Even though the clock multipliers are being
scaled and recorded correctly in both dom0 and the
hypervisor, time errors appear immediately after a
frequency change.  They are not more likely when
the frequency is constant.


Signed-off-by: Mark Langsdorf <mark.langsdorf@xxxxxxx>

diff -r 256160ff19b7 xen/include/asm-x86/msr.h
--- a/xen/include/asm-x86/msr.h Thu Aug 16 13:27:59 2007 +0100
+++ b/xen/include/asm-x86/msr.h Thu Aug 30 12:08:29 2007 -0500
@@ -357,6 +357,9 @@ static inline void write_efer(__u64 val)
 #define MSR_K8_VM_CR                   0xC0010114
 #define MSR_K8_VM_HSAVE_PA             0xC0010117
 
+#define MSR_K8_FIDVID_CTL              0xC0010041
+#define MSR_K8_FIDVID_STATUS           0xC0010042
+
 /* MSR_K8_VM_CR bits: */
 #define _K8_VMCR_SVME_DISABLE          4
 #define K8_VMCR_SVME_DISABLE           (1 << _K8_VMCR_SVME_DISABLE)
diff -r 256160ff19b7 xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c      Thu Aug 16 13:27:59 2007 +0100
+++ b/xen/arch/x86/traps.c      Thu Aug 30 12:08:29 2007 -0500
@@ -1724,6 +1724,15 @@ static int emulate_privileged_op(struct 
             v->arch.guest_context.gs_base_user = res;
             break;
 #endif
+       case MSR_K8_FIDVID_STATUS:
+       case MSR_K8_FIDVID_CTL:
+            if ( !opt_cpufreq )
+                goto fail;
+           if ( wrmsr_safe(regs->ecx, regs->eax, regs->edx) )
+               goto fail;
+            v->arch.guest_context.gs_base_user =
+               ((u64)regs->edx << 32) | regs->eax;
+           break;
         default:
             if ( wrmsr_hypervisor_regs(regs->ecx, eax, edx) )
                 break;
@@ -1760,6 +1769,13 @@ static int emulate_privileged_op(struct 
             regs->edx = v->arch.guest_context.gs_base_user >> 32;
             break;
 #endif
+       case MSR_K8_FIDVID_CTL:
+       case MSR_K8_FIDVID_STATUS:
+            if ( !opt_cpufreq )
+                goto fail;
+            if ( rdmsr_safe(regs->ecx, regs->eax, regs->edx) )
+               goto fail;
+           break;
         case MSR_EFER:
             if ( rdmsr_safe(regs->ecx, regs->eax, regs->edx) )
                 goto fail;



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