[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] RE: [Xen-devel] idle_pg_tables??
> OK, pages are 2MB in size on AMD64. Now, what is the supposed size of > that idle_pgtable_l2? According to page.h, the C view of that > variable is > > extern l2_pgentry_t idle_pg_table_l2[ROOT_PAGETABLE_ENTRIES] > with ROOT_PAGETABLE_ENTRIES=512 > > but according to x86_64.S, the memory area where that variable is > placed, namely > between 0x4000 and 0x4000+PAGE_SIZE is much bigger. What is the real > size of that > variable? > Same question for the idle_pgtable_l4 and _l3? They are, a > priori, 512*8 > bytes=2M long... Last time I calculated 512 * 8 it came to 4096 (sizeof(l2_pgentry_t) should be 8 bytes, as we're using PAE-mode in 64-bit code, and thus 8 bytes per page-table-entry). PAGE_SIZE is the basic x86 page-size of 4096, I would assume, so 512 * 8 = PAGE_SIZE, and thus it's NOT much bigger... All page-table entries that point to another page-table entry will point to an even 4K page, which means, also, that they have 512 entries in PAE-mode. In non-PAE mode each entry is 4 bytes and there are 1024 entries on each page. It depends on the actual entry in the table whether it terminates the page-table on L2 or L1. If bit 7 of the L2 entry is set, that means that the entry is a 2MB entry, and thus the entry is indicated by the bits above bit 20 (or put another way, bits 21 and up will contain the physical address of the memory actually used by the processor - it is then combined with bits 20 and down from the location indicated by the code, which is the offset into the memory). For example: 0x000002bcdef0 as an address. In binary: 0000.0000.0000.0000.0000.0010.1011.1100.1101.1110.1111.0000 47 43 39 35 31 27 23 19 15 11 7 3 (msb number) CR3 = idle_pg_table = 0x102000 Bits 47..39 -> 0.0000.0000 => 0x1020000 + (0 * 8) => idle_pg_table_l3 (0x103000) Bits 38..30 -> 0.0000.0000 => 0x1030000 + (0 * 8) => idle_pg_table_l2 (0x104000) Bits 29..21 -> 0.0001.0101 => 0x1040000 + (21 * 8) => 1040A8 -> 0x02A001e3 This means the base addres is 10MB + offset of the lower 21 bits of the number 1.1100.1101.1110.1111.0000 -> 1CBDEF0, which means that the address is 2CBDEF0 - which is what we'd expect, as it's a linear mapping. -- Mats _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel
|
Lists.xenproject.org is hosted with RackSpace, monitoring our |