[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] RE: [Xen-devel] [PATCH] [HVM] Fix virtual apic irq distribution
>> Fix virtual apic irq distribution. >> But currently we inject PIT irqs to cpu0 only. Also mute some warning >> messages. > >Does anything break if we inject PIT irqs to other than cpu0? It seems >an odd restriction -- native hardware wouldn't treat that line >specially if IRQ0 is routed through the IO-APIC, would it? You're right, on native hardware, PIT irq can be routed to any processor, and usually PIT irq handler will keep OS time by checking TSC. On native hardware, TSC are naturally synchronized across processors, so it won't be trouble. But on our VM, we will have to synchronize TSC from time to time, so PIT irq handler on different vcpu may see big TSC diff and complain about the unreliable TSC, then maybe it will try to do TSC sync, which make guest time keeping complex and unreliable. Ideally, we should not have this restriction, but for now I think this can make guest time keeping simple and reliable, and I think Eddie should have more comments on this :-) -Xin _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxx http://lists.xensource.com/xen-devel
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