Re: [Xen-devel] xen 3.0 for AMD Pacifica

[Mark Williamson <mark.williamson@xxxxxxxxxxxx>]

> I know. I have both. What I was asking is whether the info in those
> documents is sufficient to make Xen work with  the hardware of both chips,
> or is additional info needed (and still not available)?

Well, apart from the code from Intel we also have had VT SDVs in Cambridge for 
quite some time and so are able to test stuff for ourselves.  I'm not sure 
what the status is for AMD: but there's always SimNow for development / 
testing.  So in both cases there's some sort of reference implementation to 
work with.

> Pacifica has a new paging mode (paged real mode) made possible by the
> Opteron on-chip memory controller. This feature is not present in VT.

My initial impression of Pacifica was "much like VT, but with more 
goodies" ;-)

Cheers,
Mark

> > Just having the processor trap though doesn't get you virtualization
> >
> > :-)  Each of those events has to be handled, and often emulated.  Throw
> >
> > in shadow paging and IO emulation and it's all rather complicated.
> >
> > Plus, there's not much that can be done without having the hardware at
> > this point.
> >
> > >Is there any possibility of setting up a mailing list directed
> > > specifically at xen 3.0 hardware supported virtualization?
> >
> > There are an awful lot of Xen mailing lists at this point.  What would
> > be *really* useful is having some content on the wiki that went into
> > more depth about VT/Pacifica.
> >
> > Regards,
> >
> > Anthony Liguori
> >
> > >Thanks,
> > >Dave Feustel
> >
> > _______________________________________________
> > Xen-devel mailing list
> > Xen-devel@xxxxxxxxxxxxxxxxxxx
> > http://lists.xensource.com/xen-devel

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