RE: [Xen-devel] [PATCH][VT]vga acceleration for cirrus logic device model

["Jiang, Yunhong" <yunhong.jiang@xxxxxxxxx>]

Keir
        Thanks for your comments very much , please see comments below.

Thanks
Yunhong Jiang

Keir Fraser wrote:
> On 23 Sep 2005, at 10:53, Jiang, Yunhong wrote:
> 
>> When we setup the memory mapping for cirrus logic, it is on high end
>> memory and will not be on the first l2 table.
>> At that time, we have two options:
>> 1) Using this patch, setup the l2 table unconditionally on
>> xc_vmx_build. 2) Re-caculating the page array usage, and caculating
>> which page can be used for the l2 table.
> 
> [un]setup_mapping does not make assumptions about the location of the
> l2 tables. It reads their addresses from the l3 table. Also,
> setup_mapping already knows how to allocate extra page tables, because
> it allocates extra l1 tables. It can use the same allocation scheme to

setup_mapping does not allocate extra l1 table, the extra l1 table is a
parameter for it. The extra table is specially allocated for vga memory
when device model begin running.
Also the [un]setup_mapping read l2 table address from the l3 table
because it is sure the 4  L2 table has been mapped to l3 table on
xc_vmx_build, otherwise it has to do something special to check if the
l2 table is not mapped.

> allocate new l2 tables on demand.
> 
> Something like this will certainly be needed for 64-bit tables anyway,
> where it's infeasible to pre-allocate all l3 and l2 table entries.

I'm a bit confused on this. This mapping is for 1:1 page table, and
there is only one L3 table and 4 l2 table totally even for 64 bit table.

Thanks
Yunong Jiang

> 
>   -- Keir


_______________________________________________
Xen-devel mailing list
Xen-devel@xxxxxxxxxxxxxxxxxxx
http://lists.xensource.com/xen-devel