Re: [Xen-devel] [PATCH][VT] Clear the pending interrupt on shared page when PIC initialized

[Keir Fraser <Keir.Fraser@xxxxxxxxxxxx>]

On 12 Sep 2005, at 18:36, Keir Fraser wrote:

> > This patch works for following scenerio:
> > 1) The BIOS set the irq base to 0x20, and then interrupt is injected
> > through shared page.
> > 2) The OS disable interurpt , and reset the PIC with ICW1~ICW4. In 
> > this
> > process, it changes the irq base for PIC from 0x20 to 0x30 through 
> > ICW2.
> Okay, thanks for the clarification and I see why the PIT bart is 
> needed now. But, in the PIC code, wouldn't hanging the reset off of 
> cpu_reset_interrupt() make more sense?
I should add that I think in the end the PIC emulation belongs in Xen, 
or the PIT should be moved out to the qemu device model (but only after 
all that code is moved out of domain0 user space). The current 
architectural split across Xen/dom0 is pretty gross.
 -- Keir


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