[xen staging-4.17] xen/arm: Add C1-Premium definitions

[patchbot@xxxxxxx]

commit a0371b3dedeb7035a508b5ec6d7bb6e73985c938
Author:     Michal Orzel <michal.orzel@xxxxxxx>
AuthorDate: Fri May 22 09:35:57 2026 +0200
Commit:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Thu Jun 4 22:29:13 2026 +0100

    xen/arm: Add C1-Premium definitions
    
    Add processor definitions for C1-Premium. These will be used for errata
    detection in subsequent patches.
    
    These values can be found in the C1-Premium TRM:
    
      https://developer.arm.com/documentation/109416/0100/
    
    ... in section A.5.1 ("MIDR_EL1, Main ID Register").
    
    Signed-off-by: Michal Orzel <michal.orzel@xxxxxxx>
    Reviewed-by: Julien Grall <julien@xxxxxxx>
    (cherry picked from commit 0315d10321518beb24c41bb595e9197cadec0693)
---
 xen/arch/arm/include/asm/processor.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/arch/arm/include/asm/processor.h 
b/xen/arch/arm/include/asm/processor.h
index 935dd61762..ea4cdfb3e7 100644
--- a/xen/arch/arm/include/asm/processor.h
+++ b/xen/arch/arm/include/asm/processor.h
@@ -91,6 +91,7 @@
 #define ARM_CPU_PART_NEOVERSE_V3    0xD84
 #define ARM_CPU_PART_CORTEX_X925    0xD85
 #define ARM_CPU_PART_C1_ULTRA       0xD8C
+#define ARM_CPU_PART_C1_PREMIUM     0xD90
 
 #define MIDR_CORTEX_A12 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, 
ARM_CPU_PART_CORTEX_A12)
 #define MIDR_CORTEX_A17 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, 
ARM_CPU_PART_CORTEX_A17)
@@ -122,6 +123,7 @@
 #define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, 
ARM_CPU_PART_NEOVERSE_V3)
 #define MIDR_CORTEX_X925 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, 
ARM_CPU_PART_CORTEX_X925)
 #define MIDR_C1_ULTRA MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_C1_ULTRA)
+#define MIDR_C1_PREMIUM MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, 
ARM_CPU_PART_C1_PREMIUM)
 
 /* MPIDR Multiprocessor Affinity Register */
 #define _MPIDR_UP           (30)
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.17