[xen staging-4.19] x86/amd: Fold another DE_CFG edit into amd_init_de_cfg()

[patchbot@xxxxxxx]

commit 991f480a8f1246ae5db0b91a62f819d3ea1dc539
Author:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Thu Jan 29 13:49:28 2026 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Thu Jan 29 13:49:28 2026 +0100

    x86/amd: Fold another DE_CFG edit into amd_init_de_cfg()
    
    As amd_init_de_cfg() states, it's only safe for there to be one location
    writing to DE_CFG.  This happens to be a latent bug rather than a real one
    because Fam12h CPUs aren't SMT-capable.  Nevertheless, group it together 
with
    the other DE_CFG modifications.
    
    This removes a printk() which is not noteworthy, and skips the adjustment
    entirely under virt, where the attempted write wouldn't have stuck anyway.
    
    Fixes: d0c75dc4c028 ("x86/amd: Fix race editing DE_CFG")
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
    master commit: f49bbd301b0e9eb81cff2dddf6862ec469cf8ef9
    master date: 2026-01-27 13:59:12 +0000
---
 xen/arch/x86/cpu/amd.c | 16 +++++++---------
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 84fac6ade2..ebeed00941 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -957,6 +957,13 @@ void amd_init_de_cfg(const struct cpuinfo_x86 *c)
     if ( zenbleed_use_chickenbit() )
         new |= (1 << 9);
 
+    /*
+     * Erratum #665, doc 44739.  Integer divide instructions may cause
+     * unpredictable behaviour.
+     */
+    if ( c->x86 == 0x12 )
+        new |= 1U << 31;
+
     /* Avoid reading DE_CFG if we don't intend to change anything. */
     if ( !new )
         return;
@@ -1245,15 +1252,6 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
                                            smp_processor_id());
                        wrmsrl(MSR_AMD64_LS_CFG, value | (1 << 15));
                }
-       } else if (c->x86 == 0x12) {
-               rdmsrl(MSR_AMD64_DE_CFG, value);
-               if (!(value & (1U << 31))) {
-                       if (c == &boot_cpu_data || opt_cpu_info)
-                               printk_once(XENLOG_WARNING
-                                           "CPU%u: Applying workaround for 
erratum 665\n",
-                                           smp_processor_id());
-                       wrmsrl(MSR_AMD64_DE_CFG, value | (1U << 31));
-               }
        }
 
        /* AMD CPUs do not support SYSENTER outside of legacy mode. */
--
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