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[xen master] x86/svm: Move asm/hvm/svm/svm.h up one directory



commit f28c2f8f7b503a429d183b45ba655cac153b3d51
Author:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Fri Dec 12 16:22:31 2025 +0000
Commit:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Mon Dec 15 11:24:26 2025 +0000

    x86/svm: Move asm/hvm/svm/svm.h up one directory
    
    ... in preparation to remove the svm/ directory entirely.
    
    intr.c doesn't need to include svm.h at all.
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
---
 xen/arch/x86/cpu-policy.c              |  2 +-
 xen/arch/x86/domain.c                  |  2 +-
 xen/arch/x86/hvm/svm/asid.c            |  2 +-
 xen/arch/x86/hvm/svm/emulate.c         |  2 +-
 xen/arch/x86/hvm/svm/intr.c            |  1 -
 xen/arch/x86/hvm/svm/nestedsvm.c       |  2 +-
 xen/arch/x86/hvm/svm/svm.c             |  2 +-
 xen/arch/x86/hvm/svm/vmcb.c            |  2 +-
 xen/arch/x86/include/asm/hvm/svm.h     | 60 ++++++++++++++++++++++++++++++++++
 xen/arch/x86/include/asm/hvm/svm/svm.h | 60 ----------------------------------
 xen/arch/x86/spec_ctrl.c               |  2 +-
 11 files changed, 68 insertions(+), 69 deletions(-)

diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c
index 0a7ef15f72..372d11f2ff 100644
--- a/xen/arch/x86/cpu-policy.c
+++ b/xen/arch/x86/cpu-policy.c
@@ -9,7 +9,7 @@
 #include <asm/amd.h>
 #include <asm/cpu-policy.h>
 #include <asm/hvm/nestedhvm.h>
-#include <asm/hvm/svm/svm.h>
+#include <asm/hvm/svm.h>
 #include <asm/intel-family.h>
 #include <asm/msr-index.h>
 #include <asm/paging.h>
diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index b151201809..7632d5e2d6 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -48,7 +48,7 @@
 #include <asm/guest-msr.h>
 #include <asm/hvm/hvm.h>
 #include <asm/hvm/nestedhvm.h>
-#include <asm/hvm/svm/svm.h>
+#include <asm/hvm/svm.h>
 #include <asm/hvm/viridian.h>
 #include <asm/i387.h>
 #include <asm/idt.h>
diff --git a/xen/arch/x86/hvm/svm/asid.c b/xen/arch/x86/hvm/svm/asid.c
index 0e115243a3..53aa5d0512 100644
--- a/xen/arch/x86/hvm/svm/asid.c
+++ b/xen/arch/x86/hvm/svm/asid.c
@@ -6,7 +6,7 @@
 
 #include <asm/amd.h>
 #include <asm/hvm/nestedhvm.h>
-#include <asm/hvm/svm/svm.h>
+#include <asm/hvm/svm.h>
 
 #include "svm.h"
 #include "vmcb.h"
diff --git a/xen/arch/x86/hvm/svm/emulate.c b/xen/arch/x86/hvm/svm/emulate.c
index d8aa455908..be3a710fa5 100644
--- a/xen/arch/x86/hvm/svm/emulate.c
+++ b/xen/arch/x86/hvm/svm/emulate.c
@@ -11,7 +11,7 @@
 #include <asm/msr.h>
 #include <asm/hvm/emulate.h>
 #include <asm/hvm/hvm.h>
-#include <asm/hvm/svm/svm.h>
+#include <asm/hvm/svm.h>
 #include <asm/hvm/svm/vmcb.h>
 
 #include "svm.h"
diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c
index 931973a9fa..702c071e89 100644
--- a/xen/arch/x86/hvm/svm/intr.c
+++ b/xen/arch/x86/hvm/svm/intr.c
@@ -17,7 +17,6 @@
 #include <asm/hvm/hvm.h>
 #include <asm/hvm/io.h>
 #include <asm/hvm/vlapic.h>
-#include <asm/hvm/svm/svm.h>
 #include <asm/hvm/nestedhvm.h> /* for nestedhvm_vcpu_in_guestmode */
 #include <asm/vm_event.h>
 #include <xen/event.h>
diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c
index 63ed6c86b7..5718ca7f7f 100644
--- a/xen/arch/x86/hvm/svm/nestedsvm.c
+++ b/xen/arch/x86/hvm/svm/nestedsvm.c
@@ -6,7 +6,7 @@
  */
 
 #include <asm/hvm/support.h>
-#include <asm/hvm/svm/svm.h>
+#include <asm/hvm/svm.h>
 #include <asm/hvm/svm/vmcb.h>
 #include <asm/hvm/nestedhvm.h>
 #include <asm/paging.h> /* paging_mode_hap */
diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index 15d45cbb57..86a030b02c 100644
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -26,7 +26,7 @@
 #include <asm/hvm/monitor.h>
 #include <asm/hvm/nestedhvm.h>
 #include <asm/hvm/support.h>
-#include <asm/hvm/svm/svm.h>
+#include <asm/hvm/svm.h>
 #include <asm/hvm/svm/vmcb.h>
 #include <asm/i387.h>
 #include <asm/idt.h>
diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c
index 7bde6e98ce..463e527a7d 100644
--- a/xen/arch/x86/hvm/svm/vmcb.c
+++ b/xen/arch/x86/hvm/svm/vmcb.c
@@ -15,7 +15,7 @@
 #include <xen/softirq.h>
 
 #include <asm/guest-msr.h>
-#include <asm/hvm/svm/svm.h>
+#include <asm/hvm/svm.h>
 #include <asm/hvm/svm/vmcb.h>
 #include <asm/msr-index.h>
 #include <asm/p2m.h>
diff --git a/xen/arch/x86/include/asm/hvm/svm.h 
b/xen/arch/x86/include/asm/hvm/svm.h
new file mode 100644
index 0000000000..4eeeb25da9
--- /dev/null
+++ b/xen/arch/x86/include/asm/hvm/svm.h
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * svm.h: SVM Architecture related definitions
+ * Copyright (c) 2005, AMD Corporation.
+ * Copyright (c) 2004, Intel Corporation.
+ *
+ */
+
+#ifndef __ASM_X86_HVM_SVM_H__
+#define __ASM_X86_HVM_SVM_H__
+
+/*
+ * PV context switch helpers.  Prefetching the VMCB area itself has been shown
+ * to be useful for performance.
+ *
+ * Must only be used for NUL FS/GS, as the segment attributes/limits are not
+ * read from the GDT/LDT.
+ */
+void svm_load_segs_prefetch(void);
+bool svm_load_segs(unsigned int ldt_ents, unsigned long ldt_base,
+                   unsigned long fs_base, unsigned long gs_base,
+                   unsigned long gs_shadow);
+
+extern u32 svm_feature_flags;
+
+#define SVM_FEATURE_NPT            0 /* Nested page table support */
+#define SVM_FEATURE_LBRV           1 /* LBR virtualization support */
+#define SVM_FEATURE_SVML           2 /* SVM locking MSR support */
+#define SVM_FEATURE_NRIPS          3 /* Next RIP save on VMEXIT support */
+#define SVM_FEATURE_TSCRATEMSR     4 /* TSC ratio MSR support */
+#define SVM_FEATURE_VMCBCLEAN      5 /* VMCB clean bits support */
+#define SVM_FEATURE_FLUSHBYASID    6 /* TLB flush by ASID support */
+#define SVM_FEATURE_DECODEASSISTS  7 /* Decode assists support */
+#define SVM_FEATURE_PAUSEFILTER   10 /* Pause intercept filter support */
+#define SVM_FEATURE_PAUSETHRESH   12 /* Pause intercept filter support */
+#define SVM_FEATURE_VLOADSAVE     15 /* virtual vmload/vmsave */
+#define SVM_FEATURE_VGIF          16 /* Virtual GIF */
+#define SVM_FEATURE_SSS           19 /* NPT Supervisor Shadow Stacks */
+#define SVM_FEATURE_SPEC_CTRL     20 /* MSR_SPEC_CTRL virtualisation */
+
+static inline bool cpu_has_svm_feature(unsigned int feat)
+{
+    return svm_feature_flags & (1u << feat);
+}
+#define cpu_has_svm_npt       cpu_has_svm_feature(SVM_FEATURE_NPT)
+#define cpu_has_svm_lbrv      cpu_has_svm_feature(SVM_FEATURE_LBRV)
+#define cpu_has_svm_svml      cpu_has_svm_feature(SVM_FEATURE_SVML)
+#define cpu_has_svm_nrips     cpu_has_svm_feature(SVM_FEATURE_NRIPS)
+#define cpu_has_svm_cleanbits cpu_has_svm_feature(SVM_FEATURE_VMCBCLEAN)
+#define cpu_has_svm_flushbyasid cpu_has_svm_feature(SVM_FEATURE_FLUSHBYASID)
+#define cpu_has_svm_decode    cpu_has_svm_feature(SVM_FEATURE_DECODEASSISTS)
+#define cpu_has_svm_vgif      cpu_has_svm_feature(SVM_FEATURE_VGIF)
+#define cpu_has_pause_filter  cpu_has_svm_feature(SVM_FEATURE_PAUSEFILTER)
+#define cpu_has_pause_thresh  cpu_has_svm_feature(SVM_FEATURE_PAUSETHRESH)
+#define cpu_has_tsc_ratio     cpu_has_svm_feature(SVM_FEATURE_TSCRATEMSR)
+#define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE)
+#define cpu_has_svm_sss       cpu_has_svm_feature(SVM_FEATURE_SSS)
+#define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL)
+
+#endif /* __ASM_X86_HVM_SVM_H__ */
diff --git a/xen/arch/x86/include/asm/hvm/svm/svm.h 
b/xen/arch/x86/include/asm/hvm/svm/svm.h
deleted file mode 100644
index 4eeeb25da9..0000000000
--- a/xen/arch/x86/include/asm/hvm/svm/svm.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * svm.h: SVM Architecture related definitions
- * Copyright (c) 2005, AMD Corporation.
- * Copyright (c) 2004, Intel Corporation.
- *
- */
-
-#ifndef __ASM_X86_HVM_SVM_H__
-#define __ASM_X86_HVM_SVM_H__
-
-/*
- * PV context switch helpers.  Prefetching the VMCB area itself has been shown
- * to be useful for performance.
- *
- * Must only be used for NUL FS/GS, as the segment attributes/limits are not
- * read from the GDT/LDT.
- */
-void svm_load_segs_prefetch(void);
-bool svm_load_segs(unsigned int ldt_ents, unsigned long ldt_base,
-                   unsigned long fs_base, unsigned long gs_base,
-                   unsigned long gs_shadow);
-
-extern u32 svm_feature_flags;
-
-#define SVM_FEATURE_NPT            0 /* Nested page table support */
-#define SVM_FEATURE_LBRV           1 /* LBR virtualization support */
-#define SVM_FEATURE_SVML           2 /* SVM locking MSR support */
-#define SVM_FEATURE_NRIPS          3 /* Next RIP save on VMEXIT support */
-#define SVM_FEATURE_TSCRATEMSR     4 /* TSC ratio MSR support */
-#define SVM_FEATURE_VMCBCLEAN      5 /* VMCB clean bits support */
-#define SVM_FEATURE_FLUSHBYASID    6 /* TLB flush by ASID support */
-#define SVM_FEATURE_DECODEASSISTS  7 /* Decode assists support */
-#define SVM_FEATURE_PAUSEFILTER   10 /* Pause intercept filter support */
-#define SVM_FEATURE_PAUSETHRESH   12 /* Pause intercept filter support */
-#define SVM_FEATURE_VLOADSAVE     15 /* virtual vmload/vmsave */
-#define SVM_FEATURE_VGIF          16 /* Virtual GIF */
-#define SVM_FEATURE_SSS           19 /* NPT Supervisor Shadow Stacks */
-#define SVM_FEATURE_SPEC_CTRL     20 /* MSR_SPEC_CTRL virtualisation */
-
-static inline bool cpu_has_svm_feature(unsigned int feat)
-{
-    return svm_feature_flags & (1u << feat);
-}
-#define cpu_has_svm_npt       cpu_has_svm_feature(SVM_FEATURE_NPT)
-#define cpu_has_svm_lbrv      cpu_has_svm_feature(SVM_FEATURE_LBRV)
-#define cpu_has_svm_svml      cpu_has_svm_feature(SVM_FEATURE_SVML)
-#define cpu_has_svm_nrips     cpu_has_svm_feature(SVM_FEATURE_NRIPS)
-#define cpu_has_svm_cleanbits cpu_has_svm_feature(SVM_FEATURE_VMCBCLEAN)
-#define cpu_has_svm_flushbyasid cpu_has_svm_feature(SVM_FEATURE_FLUSHBYASID)
-#define cpu_has_svm_decode    cpu_has_svm_feature(SVM_FEATURE_DECODEASSISTS)
-#define cpu_has_svm_vgif      cpu_has_svm_feature(SVM_FEATURE_VGIF)
-#define cpu_has_pause_filter  cpu_has_svm_feature(SVM_FEATURE_PAUSEFILTER)
-#define cpu_has_pause_thresh  cpu_has_svm_feature(SVM_FEATURE_PAUSETHRESH)
-#define cpu_has_tsc_ratio     cpu_has_svm_feature(SVM_FEATURE_TSCRATEMSR)
-#define cpu_has_svm_vloadsave cpu_has_svm_feature(SVM_FEATURE_VLOADSAVE)
-#define cpu_has_svm_sss       cpu_has_svm_feature(SVM_FEATURE_SSS)
-#define cpu_has_svm_spec_ctrl cpu_has_svm_feature(SVM_FEATURE_SPEC_CTRL)
-
-#endif /* __ASM_X86_HVM_SVM_H__ */
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index e71f62c601..dd0413e1fc 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -11,7 +11,7 @@
 #include <xen/warning.h>
 
 #include <asm/amd.h>
-#include <asm/hvm/svm/svm.h>
+#include <asm/hvm/svm.h>
 #include <asm/intel-family.h>
 #include <asm/microcode.h>
 #include <asm/msr.h>
--
generated by git-patchbot for /home/xen/git/xen.git#master



 


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