[xen staging] riscv: Remove asm/byteorder.h

[patchbot@xxxxxxx]

commit 7aed4daa38ddf0b505eb107565c89ab06b121fb7
Author:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Fri Mar 28 11:50:16 2025 +0000
Commit:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Fri Apr 18 15:16:12 2025 +0100

    riscv: Remove asm/byteorder.h
    
    With the common code moved fully onto xen/byteorder.h, clean up the dregs.
    
    The use of byteorder.h in io.h appears to have been copy&paste from ARM.  
It's
    not needed, but macros and types are.
    
    No functional change.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Reviewed-by: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>
---
 xen/arch/riscv/include/asm/byteorder.h | 14 --------------
 xen/arch/riscv/include/asm/io.h        |  3 ++-
 2 files changed, 2 insertions(+), 15 deletions(-)

diff --git a/xen/arch/riscv/include/asm/byteorder.h 
b/xen/arch/riscv/include/asm/byteorder.h
deleted file mode 100644
index a32bca02df..0000000000
--- a/xen/arch/riscv/include/asm/byteorder.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef ASM__RISCV__BYTEORDER_H
-#define ASM__RISCV__BYTEORDER_H
-
-#include <xen/byteorder.h>
-
-#endif /* ASM__RISCV__BYTEORDER_H */
-/*
- * Local variables:
- * mode: C
- * c-file-style: "BSD"
- * c-basic-offset: 4
- * indent-tabs-mode: nil
- * End:
- */
diff --git a/xen/arch/riscv/include/asm/io.h b/xen/arch/riscv/include/asm/io.h
index 55f329dde3..8bab4ffa03 100644
--- a/xen/arch/riscv/include/asm/io.h
+++ b/xen/arch/riscv/include/asm/io.h
@@ -38,7 +38,8 @@
 #ifndef ASM__RISCV__IO_H
 #define ASM__RISCV__IO_H
 
-#include <asm/byteorder.h>
+#include <xen/macros.h>
+#include <xen/types.h>
 
 /*
  * The RISC-V ISA doesn't yet specify how to query or modify PMAs, so we can't
--
generated by git-patchbot for /home/xen/git/xen.git#staging