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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen staging] x86/e820: Remove opencoded vendor/feature checks
commit ac29d63a0fa6a3ed98ecf86f95995811c301308f
Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Thu Mar 6 23:21:07 2025 +0000
Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Fri Mar 7 14:34:08 2025 +0000
x86/e820: Remove opencoded vendor/feature checks
We've already scanned features by the time init_e820() is called. Remove
the
cpuid() calls.
Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
---
xen/arch/x86/e820.c | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/xen/arch/x86/e820.c b/xen/arch/x86/e820.c
index e052e84de7..ca577c0bde 100644
--- a/xen/arch/x86/e820.c
+++ b/xen/arch/x86/e820.c
@@ -421,21 +421,12 @@ static void __init clip_to_limit(uint64_t limit, const
char *warnmsg)
/* Conservative estimate of top-of-RAM by looking for MTRR WB regions. */
static uint64_t __init mtrr_top_of_ram(void)
{
- uint32_t eax, ebx, ecx, edx;
uint64_t mtrr_cap, mtrr_def, addr_mask, base, mask, top;
unsigned int i;
/* By default we check only Intel systems. */
if ( e820_mtrr_clip == -1 )
- {
- char vendor[13];
- cpuid(0x00000000, &eax,
- (uint32_t *)&vendor[0],
- (uint32_t *)&vendor[8],
- (uint32_t *)&vendor[4]);
- vendor[12] = '\0';
- e820_mtrr_clip = !strcmp(vendor, "GenuineIntel");
- }
+ e820_mtrr_clip = boot_cpu_data.x86_vendor == X86_VENDOR_INTEL;
if ( !e820_mtrr_clip )
return 0;
@@ -444,8 +435,7 @@ static uint64_t __init mtrr_top_of_ram(void)
printk("Checking MTRR ranges...\n");
/* Does the CPU support architectural MTRRs? */
- cpuid(0x00000001, &eax, &ebx, &ecx, &edx);
- if ( !test_bit(X86_FEATURE_MTRR & 31, &edx) )
+ if ( !cpu_has_mtrr )
return 0;
/* paddr_bits must have been set at this point */
--
generated by git-patchbot for /home/xen/git/xen.git#staging
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