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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen staging] VMX: convert vmx_secondary_exec_control
commit 11077f166085054631d133cc70465ceb9e4a9ac5
Author: Jan Beulich <jbeulich@xxxxxxxx>
AuthorDate: Thu Mar 6 13:58:24 2025 +0100
Commit: Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Thu Mar 6 13:58:24 2025 +0100
VMX: convert vmx_secondary_exec_control
... to a field in the capability/controls struct.
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
Acked-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
---
xen/arch/x86/hvm/vmx/vmcs.c | 42 +++++++++++++++------------------
xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 42 ++++++++++++++++-----------------
2 files changed, 40 insertions(+), 44 deletions(-)
diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index bf73babac0..46dcdc21ec 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -164,7 +164,6 @@ static int cf_check parse_ept_param_runtime(const char *s)
/* Dynamic (run-time adjusted) execution control flags. */
struct vmx_caps __ro_after_init vmx_caps;
-u32 vmx_secondary_exec_control __read_mostly;
uint64_t vmx_tertiary_exec_control __read_mostly;
u32 vmx_vmexit_control __read_mostly;
u32 vmx_vmentry_control __read_mostly;
@@ -264,7 +263,6 @@ static int vmx_init_vmcs_config(bool bsp)
{
u32 vmx_basic_msr_low, vmx_basic_msr_high, min, opt;
struct vmx_caps caps = {};
- u32 _vmx_secondary_exec_control = 0;
uint64_t _vmx_tertiary_exec_control = 0;
u64 _vmx_ept_vpid_cap = 0;
u64 _vmx_misc_cap = 0;
@@ -359,7 +357,7 @@ static int vmx_init_vmcs_config(bool bsp)
SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |
SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE;
- _vmx_secondary_exec_control = adjust_vmx_controls(
+ caps.secondary_exec_control = adjust_vmx_controls(
"Secondary Exec Control", min, opt,
MSR_IA32_VMX_PROCBASED_CTLS2, &mismatch);
}
@@ -375,7 +373,7 @@ static int vmx_init_vmcs_config(bool bsp)
}
/* The IA32_VMX_EPT_VPID_CAP MSR exists only when EPT or VPID available */
- if ( _vmx_secondary_exec_control & (SECONDARY_EXEC_ENABLE_EPT |
+ if ( caps.secondary_exec_control & (SECONDARY_EXEC_ENABLE_EPT |
SECONDARY_EXEC_ENABLE_VPID) )
{
rdmsrl(MSR_IA32_VMX_EPT_VPID_CAP, _vmx_ept_vpid_cap);
@@ -397,7 +395,7 @@ static int vmx_init_vmcs_config(bool bsp)
if ( !(_vmx_ept_vpid_cap & VMX_EPT_MEMORY_TYPE_WB) ||
!(_vmx_ept_vpid_cap & VMX_EPT_WALK_LENGTH_4_SUPPORTED) ||
!(_vmx_ept_vpid_cap & VMX_EPT_INVEPT_ALL_CONTEXT) )
- _vmx_secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_EPT;
+ caps.secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_EPT;
/*
* the CPU must support INVVPID all context invalidation, because we
@@ -406,14 +404,14 @@ static int vmx_init_vmcs_config(bool bsp)
* Or we just don't use VPID.
*/
if ( !(_vmx_ept_vpid_cap & VMX_VPID_INVVPID_ALL_CONTEXT) )
- _vmx_secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_VPID;
+ caps.secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_VPID;
/* EPT A/D bits is required for PML */
if ( !(_vmx_ept_vpid_cap & VMX_EPT_AD_BIT) )
- _vmx_secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_PML;
+ caps.secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_PML;
}
- if ( _vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT )
+ if ( caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT )
{
/*
* To use EPT we expect to be able to clear certain intercepts.
@@ -426,25 +424,25 @@ static int vmx_init_vmcs_config(bool bsp)
if ( must_be_one & (CPU_BASED_INVLPG_EXITING |
CPU_BASED_CR3_LOAD_EXITING |
CPU_BASED_CR3_STORE_EXITING) )
- _vmx_secondary_exec_control &=
+ caps.secondary_exec_control &=
~(SECONDARY_EXEC_ENABLE_EPT |
SECONDARY_EXEC_UNRESTRICTED_GUEST);
}
/* PML cannot be supported if EPT is not used */
- if ( !(_vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT) )
- _vmx_secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_PML;
+ if ( !(caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT) )
+ caps.secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_PML;
/* Turn off opt_ept_pml if PML feature is not present. */
- if ( !(_vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_PML) )
+ if ( !(caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_PML) )
opt_ept_pml = false;
- if ( (_vmx_secondary_exec_control & SECONDARY_EXEC_PAUSE_LOOP_EXITING) &&
+ if ( (caps.secondary_exec_control & SECONDARY_EXEC_PAUSE_LOOP_EXITING) &&
ple_gap == 0 )
{
if ( !vmx_caps.pin_based_exec_control )
printk(XENLOG_INFO "Disable Pause-Loop Exiting.\n");
- _vmx_secondary_exec_control &= ~ SECONDARY_EXEC_PAUSE_LOOP_EXITING;
+ caps.secondary_exec_control &= ~ SECONDARY_EXEC_PAUSE_LOOP_EXITING;
}
min = VM_EXIT_ACK_INTR_ON_EXIT;
@@ -459,7 +457,7 @@ static int vmx_init_vmcs_config(bool bsp)
* delivery" and "acknowledge interrupt on exit" is set. For the latter
* is a minimal requirement, only check the former, which is optional.
*/
- if ( !(_vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY)
)
+ if ( !(caps.secondary_exec_control & SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY)
)
caps.pin_based_exec_control &= ~PIN_BASED_POSTED_INTERRUPT;
if ( iommu_intpost &&
@@ -471,7 +469,7 @@ static int vmx_init_vmcs_config(bool bsp)
}
/* The IA32_VMX_VMFUNC MSR exists only when VMFUNC is available */
- if ( _vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VM_FUNCTIONS )
+ if ( caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_VM_FUNCTIONS )
{
rdmsrl(MSR_IA32_VMX_VMFUNC, _vmx_vmfunc);
@@ -481,12 +479,12 @@ static int vmx_init_vmcs_config(bool bsp)
* Or we just don't use VMFUNC.
*/
if ( !(_vmx_vmfunc & VMX_VMFUNC_EPTP_SWITCHING) )
- _vmx_secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_VM_FUNCTIONS;
+ caps.secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_VM_FUNCTIONS;
}
/* Virtualization exceptions are only enabled if VMFUNC is enabled */
- if ( !(_vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VM_FUNCTIONS) )
- _vmx_secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS;
+ if ( !(caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_VM_FUNCTIONS) )
+ caps.secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS;
min = 0;
opt = (VM_ENTRY_LOAD_GUEST_PAT | VM_ENTRY_LOAD_GUEST_EFER |
@@ -501,7 +499,6 @@ static int vmx_init_vmcs_config(bool bsp)
{
/* First time through. */
vmx_caps = caps;
- vmx_secondary_exec_control = _vmx_secondary_exec_control;
vmx_tertiary_exec_control = _vmx_tertiary_exec_control;
vmx_ept_vpid_cap = _vmx_ept_vpid_cap;
vmx_vmexit_control = _vmx_vmexit_control;
@@ -536,7 +533,7 @@ static int vmx_init_vmcs_config(bool bsp)
vmx_caps.cpu_based_exec_control, caps.cpu_based_exec_control);
mismatch |= cap_check(
"Secondary Exec Control",
- vmx_secondary_exec_control, _vmx_secondary_exec_control);
+ vmx_caps.secondary_exec_control, caps.secondary_exec_control);
mismatch |= cap_check(
"Tertiary Exec Control",
vmx_tertiary_exec_control, _vmx_tertiary_exec_control);
@@ -1117,7 +1114,7 @@ static int construct_vmcs(struct vcpu *v)
if ( d->arch.vtsc && !cpu_has_vmx_tsc_scaling )
v->arch.hvm.vmx.exec_control |= CPU_BASED_RDTSC_EXITING;
- v->arch.hvm.vmx.secondary_exec_control = vmx_secondary_exec_control;
+ v->arch.hvm.vmx.secondary_exec_control = vmx_caps.secondary_exec_control;
v->arch.hvm.vmx.tertiary_exec_control = vmx_tertiary_exec_control;
/*
@@ -2227,7 +2224,6 @@ int __init vmx_vmcs_init(void)
* Make sure all dependent features are off as well.
*/
memset(&vmx_caps, 0, sizeof(vmx_caps));
- vmx_secondary_exec_control = 0;
vmx_tertiary_exec_control = 0;
vmx_vmexit_control = 0;
vmx_vmentry_control = 0;
diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
index 685a28c336..968d8706f7 100644
--- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
@@ -258,7 +258,6 @@ extern u32 vmx_vmentry_control;
#define SECONDARY_EXEC_TSC_SCALING 0x02000000U
#define SECONDARY_EXEC_BUS_LOCK_DETECTION 0x40000000U
#define SECONDARY_EXEC_NOTIFY_VM_EXITING 0x80000000U
-extern u32 vmx_secondary_exec_control;
#define TERTIARY_EXEC_LOADIWKEY_EXITING BIT(0, UL)
#define TERTIARY_EXEC_ENABLE_HLAT BIT(1, UL)
@@ -303,15 +302,16 @@ struct vmx_caps {
uint64_t basic_msr;
uint32_t pin_based_exec_control;
uint32_t cpu_based_exec_control;
+ uint32_t secondary_exec_control;
};
extern struct vmx_caps vmx_caps;
#define cpu_has_wbinvd_exiting \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_WBINVD_EXITING)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_WBINVD_EXITING))
#define cpu_has_vmx_virtualize_apic_accesses \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES)
+ (vmx_caps.secondary_exec_control &
SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES))
#define cpu_has_vmx_tpr_shadow \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
(vmx_caps.cpu_based_exec_control & CPU_BASED_TPR_SHADOW))
@@ -329,16 +329,16 @@ extern struct vmx_caps vmx_caps;
(vmx_caps.cpu_based_exec_control & CPU_BASED_ACTIVATE_TERTIARY_CONTROLS))
#define cpu_has_vmx_ept \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT))
#define cpu_has_vmx_dt_exiting \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_DESCRIPTOR_TABLE_EXITING)
+ (vmx_caps.secondary_exec_control &
SECONDARY_EXEC_DESCRIPTOR_TABLE_EXITING))
#define cpu_has_vmx_rdtscp \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_RDTSCP)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_RDTSCP))
#define cpu_has_vmx_vpid \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VPID)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_VPID))
#define cpu_has_monitor_trap_flag \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
(vmx_caps.cpu_based_exec_control & CPU_BASED_MONITOR_TRAP_FLAG))
@@ -350,56 +350,56 @@ extern struct vmx_caps vmx_caps;
vmx_vmentry_control & VM_ENTRY_LOAD_GUEST_EFER)
#define cpu_has_vmx_unrestricted_guest \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_UNRESTRICTED_GUEST)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_UNRESTRICTED_GUEST))
#define vmx_unrestricted_guest(v) \
((v)->arch.hvm.vmx.secondary_exec_control & \
SECONDARY_EXEC_UNRESTRICTED_GUEST)
#define cpu_has_vmx_ple \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_PAUSE_LOOP_EXITING)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_PAUSE_LOOP_EXITING))
#define cpu_has_vmx_invpcid \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_INVPCID)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_INVPCID))
#define cpu_has_vmx_apic_reg_virt \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_APIC_REGISTER_VIRT)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_APIC_REGISTER_VIRT))
#define cpu_has_vmx_virtual_intr_delivery \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY))
#define cpu_has_vmx_virtualize_x2apic_mode \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE))
#define cpu_has_vmx_posted_intr_processing \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
(vmx_caps.pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT))
#define cpu_has_vmx_vmcs_shadowing \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VMCS_SHADOWING)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_VMCS_SHADOWING))
#define cpu_has_vmx_vmfunc \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VM_FUNCTIONS)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_VM_FUNCTIONS))
#define cpu_has_vmx_virt_exceptions \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS))
#define cpu_has_vmx_pml \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_PML)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_PML))
#define cpu_has_vmx_mpx \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
(vmx_vmexit_control & VM_EXIT_CLEAR_BNDCFGS) && \
(vmx_vmentry_control & VM_ENTRY_LOAD_BNDCFGS))
#define cpu_has_vmx_xsaves \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_XSAVES)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_XSAVES))
#define cpu_has_vmx_tsc_scaling \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_TSC_SCALING)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_TSC_SCALING))
#define cpu_has_vmx_bus_lock_detection \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_BUS_LOCK_DETECTION)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_BUS_LOCK_DETECTION))
#define cpu_has_vmx_notify_vm_exiting \
(IS_ENABLED(CONFIG_INTEL_VMX) && \
- vmx_secondary_exec_control & SECONDARY_EXEC_NOTIFY_VM_EXITING)
+ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_NOTIFY_VM_EXITING))
#define VMCS_RID_TYPE_MASK 0x80000000U
--
generated by git-patchbot for /home/xen/git/xen.git#staging
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