[xen staging] x86/mce: Compile do_mca() for CONFIG_PV only

[patchbot@xxxxxxx]

commit c74230bdce55b41e3809947eaf64b68e22b132ff
Author:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Tue Nov 19 10:40:41 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Wed Nov 20 14:07:31 2024 +0000

    x86/mce: Compile do_mca() for CONFIG_PV only
    
    Eclair reports a Misra Rule 8.4 violation; that do_mca() can't see it's
    declaration.  It turns out that this is a consequence of do_mca() being
    PV-only, and the declaration being compiled out in !PV builds.
    
    Therefore, arrange for do_mca() to be compiled out in !PV builds.  This in
    turn requires a number of static functions to become __maybe_unused.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
    Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx>
---
 xen/arch/x86/cpu/mcheck/mce.c | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c
index 32c1b2756b..9028ccde54 100644
--- a/xen/arch/x86/cpu/mcheck/mce.c
+++ b/xen/arch/x86/cpu/mcheck/mce.c
@@ -932,7 +932,7 @@ void x86_mcinfo_dump(struct mc_info *mi)
     } while ( 1 );
 }
 
-static void cf_check do_mc_get_cpu_info(void *v)
+static void cf_check __maybe_unused do_mc_get_cpu_info(void *v)
 {
     int cpu = smp_processor_id();
     int cindex, cpn;
@@ -1114,7 +1114,7 @@ bool intpose_inval(unsigned int cpu_nr, uint64_t msr)
      (r) <= MSR_IA32_MCx_MISC(per_cpu(nr_mce_banks, cpu) - 1) && \
      ((r) - MSR_IA32_MC0_CTL) % 4) /* excludes MCi_CTL */
 
-static bool x86_mc_msrinject_verify(struct xen_mc_msrinject *mci)
+static bool __maybe_unused x86_mc_msrinject_verify(struct xen_mc_msrinject 
*mci)
 {
     const struct cpuinfo_x86 *c = &cpu_data[mci->mcinj_cpunr];
     int i, errs = 0;
@@ -1192,7 +1192,7 @@ static bool x86_mc_msrinject_verify(struct 
xen_mc_msrinject *mci)
     return !errs;
 }
 
-static uint64_t x86_mc_hwcr_wren(void)
+static uint64_t __maybe_unused x86_mc_hwcr_wren(void)
 {
     uint64_t old;
 
@@ -1207,13 +1207,13 @@ static uint64_t x86_mc_hwcr_wren(void)
     return old;
 }
 
-static void x86_mc_hwcr_wren_restore(uint64_t hwcr)
+static void __maybe_unused x86_mc_hwcr_wren_restore(uint64_t hwcr)
 {
     if ( !(hwcr & K8_HWCR_MCi_STATUS_WREN) )
         wrmsrl(MSR_K8_HWCR, hwcr);
 }
 
-static void cf_check x86_mc_msrinject(void *data)
+static void cf_check __maybe_unused x86_mc_msrinject(void *data)
 {
     struct xen_mc_msrinject *mci = data;
     struct mcinfo_msr *msr;
@@ -1244,13 +1244,14 @@ static void cf_check x86_mc_msrinject(void *data)
         x86_mc_hwcr_wren_restore(hwcr);
 }
 
-/*ARGSUSED*/
-static void cf_check x86_mc_mceinject(void *data)
+static void cf_check __maybe_unused x86_mc_mceinject(void *data)
 {
     printk("Simulating #MC on cpu %d\n", smp_processor_id());
     __asm__ __volatile__("int $0x12");
 }
 
+#ifdef CONFIG_PV /* do_mca() hypercall is PV-only */
+
 #if BITS_PER_LONG == 64
 
 #define ID2COOKIE(id) ((mctelem_cookie_t)(id))
@@ -1654,6 +1655,8 @@ long do_mca(XEN_GUEST_HANDLE_PARAM(xen_mc_t) u_xen_mc)
     return ret;
 }
 
+#endif /* CONFIG_PV */
+
 static int mcinfo_dumped;
 
 static int cf_check x86_mcinfo_dump_panic(mctelem_cookie_t mctc)
--
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