[xen staging] x86/entry: Simplify expressions in compat_restore_all_guest()

[patchbot@xxxxxxx]

commit 0603a0c0923c278e2073c4aa00684c6269df317e
Author:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Tue Feb 20 20:54:10 2024 +0000
Commit:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Mon Feb 26 18:20:27 2024 +0000

    x86/entry: Simplify expressions in compat_restore_all_guest()
    
    compat_restore_all_guest() already has SPEC_CTRL_EXIT_TO_PV with a 
documented
    requirement for %rsp to be both regs and cpuinfo.
    
    Use the now-normal annotations and simplify the expressions which happen to 
be
    a subtraction of 0.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
---
 xen/arch/x86/x86_64/compat/entry.S | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/xen/arch/x86/x86_64/compat/entry.S 
b/xen/arch/x86/x86_64/compat/entry.S
index 93fbbeb4ae..727ab65290 100644
--- a/xen/arch/x86/x86_64/compat/entry.S
+++ b/xen/arch/x86/x86_64/compat/entry.S
@@ -117,19 +117,19 @@ compat_process_trap:
         jmp   compat_test_all_events
 END(compat_test_all_events)
 
-/* %rbx: struct vcpu, interrupts disabled */
+/* %rbx: struct vcpu, interrupts disabled, %rsp=regs/cpuinfo */
 FUNC(compat_restore_all_guest)
         ASSERT_INTERRUPTS_DISABLED
         mov   $~(X86_EFLAGS_IOPL | X86_EFLAGS_VM), %r11d
         and   UREGS_eflags(%rsp),%r11d
 
-.macro alt_cr4_pv32
+.macro alt_cr4_pv32 /* %rsp=regs/cpuinfo */
         testb $3,UREGS_cs(%rsp)
         jpe   2f
-        mov   CPUINFO_cr4-CPUINFO_guest_cpu_user_regs(%rsp), %rax
+        mov   CPUINFO_cr4(%rsp), %rax
         and   $~XEN_CR4_PV32_BITS, %rax
 1:
-        mov   %rax, CPUINFO_cr4-CPUINFO_guest_cpu_user_regs(%rsp)
+        mov   %rax, CPUINFO_cr4(%rsp)
         mov   %rax, %cr4
         /*
          * An NMI or MCE may have occurred between the previous two
@@ -141,7 +141,7 @@ FUNC(compat_restore_all_guest)
          * loop to cause a live lock: If NMIs/MCEs occurred at that
          * high a rate, we'd be live locked anyway.
          */
-        cmp   %rax, CPUINFO_cr4-CPUINFO_guest_cpu_user_regs(%rsp)
+        cmp   %rax, CPUINFO_cr4(%rsp)
         jne   1b
 2:
 .endm
--
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