[xen master] iommu/vt-d: fix SAGAW capability parsing

[patchbot@xxxxxxx]

commit 474fc7d3c6525e209bd2fe1e6ef0bbb34de86bb4
Author:     Roger Pau Monne <roger.pau@xxxxxxxxxx>
AuthorDate: Wed Oct 18 18:07:33 2023 +0200
Commit:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Thu Oct 19 21:52:52 2023 +0100

    iommu/vt-d: fix SAGAW capability parsing
    
    SAGAW is a bitmap field, with bits 1, 2 and 3 signaling support for 3, 4 
and 5
    level page tables respectively.  According to the Intel VT-d specification, 
an
    IOMMU can report multiple SAGAW bits being set.
    
    Commit 859d11b27912 claims to replace the open-coded find_first_set_bit(), 
but
    it's actually replacing an open coded implementation to find the last set 
bit.
    The change forces the used AGAW to the lowest supported by the IOMMU 
instead of
    the highest one between 1 and 2.
    
    Restore the previous SAGAW parsing by using fls() instead of
    find_first_set_bit(), in order to get the highest (supported) AGAW to be 
used.
    
    However there's a caveat related to the value the AW context entry field 
must
    be set to when using passthrough mode:
    
    "When the Translation-type (TT) field indicates pass-through processing 
(10b),
    this field must be programmed to indicate the largest AGAW value supported 
by
    hardware." [0]
    
    Newer Intel IOMMU implementations support 5 level page tables for the IOMMU,
    and signal such support in SAGAW bit 3.
    
    Enabling 5 level paging support (AGAW 3) is too risky at this point in the 
Xen
    4.18 release, so instead put a bodge to unconditionally disable passthough
    mode if SAGAW has any bits greater than 2 set.  Ignore bit 0; it's reserved 
in
    current specifications, but had a meaning in the past and is unlikely to be
    reused in the future.
    
    Note the message about unhandled SAGAW bits being set is printed
    unconditionally, regardless of whether passthrough mode is enabled.  This is
    done in order to easily notice IOMMU implementations with not yet supported
    SAGAW values.
    
    [0] Intel VT Directed Spec Rev 4.1
    
    Fixes: 859d11b27912 ('VT-d: prune SAGAW recognition')
    Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
    Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
    Release-acked-by: Henry Wang <Henry.Wang@xxxxxxx>
---
 xen/drivers/passthrough/vtd/iommu.c | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/xen/drivers/passthrough/vtd/iommu.c 
b/xen/drivers/passthrough/vtd/iommu.c
index d34c98d9c7..e13b7d99db 100644
--- a/xen/drivers/passthrough/vtd/iommu.c
+++ b/xen/drivers/passthrough/vtd/iommu.c
@@ -1327,15 +1327,25 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd)
 
     /* Calculate number of pagetable levels: 3 or 4. */
     sagaw = cap_sagaw(iommu->cap);
-    if ( sagaw & 6 )
-        agaw = find_first_set_bit(sagaw & 6);
-    if ( !agaw )
+    agaw = fls(sagaw & 6) - 1;
+    if ( agaw <= 0 )
     {
         printk(XENLOG_ERR VTDPREFIX "IOMMU: unsupported sagaw %x\n", sagaw);
         print_iommu_regs(drhd);
         rc = -ENODEV;
         goto free;
     }
+
+    if ( sagaw >> 3 )
+    {
+        printk_once(XENLOG_WARNING VTDPREFIX
+                    " Unhandled bits in SAGAW %#x%s\n",
+                    sagaw,
+                    iommu_hwdom_passthrough ? ", disabling passthrough" : "");
+
+        iommu_hwdom_passthrough = false;
+    }
+
     iommu->nr_pt_levels = agaw_to_level(agaw);
     if ( min_pt_levels > iommu->nr_pt_levels )
         min_pt_levels = iommu->nr_pt_levels;
--
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