|
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen stable-4.14] x86/spec-ctrl: Enumeration for PBRSB_NO
commit c47bfc94c0817361f7bbfe62f215e17b0125d551
Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Fri Jul 29 14:22:53 2022 +0100
Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Thu Aug 3 19:14:19 2023 +0100
x86/spec-ctrl: Enumeration for PBRSB_NO
The PBRSB_NO bit indicates that the CPU is not vulnerable to the
Post-Barrier
RSB speculative vulnerability.
Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
(cherry picked from commit b874e47eb13feb75be3ee7b5dc4ae9c97d80d774)
---
xen/arch/x86/msr.c | 5 +++--
xen/arch/x86/spec_ctrl.c | 3 ++-
xen/include/asm-x86/msr-index.h | 1 +
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c
index 527205518c..6517e50c9f 100644
--- a/xen/arch/x86/msr.c
+++ b/xen/arch/x86/msr.c
@@ -72,7 +72,8 @@ static void __init calculate_host_policy(void)
ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO |
ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO |
ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO |
- ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO);
+ ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO |
+ ARCH_CAPS_PBRSB_NO);
}
static void __init calculate_pv_max_policy(void)
@@ -164,7 +165,7 @@ int init_domain_msr_policy(struct domain *d)
ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO
|
ARCH_CAPS_TAA_NO | ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO |
ARCH_CAPS_PSDP_NO | ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA |
- ARCH_CAPS_BHI_NO);
+ ARCH_CAPS_BHI_NO | ARCH_CAPS_PBRSB_NO);
}
d->arch.msr = mp;
diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index c650e07b06..9ce493d6bc 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -419,7 +419,7 @@ static void __init print_details(enum ind_thunk thunk,
uint64_t caps)
* Hardware read-only information, stating immunity to certain issues, or
* suggestions of which mitigation to use.
*/
- printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
+ printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
(caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO"
: "",
(caps & ARCH_CAPS_IBRS_ALL) ? " IBRS_ALL"
: "",
(caps & ARCH_CAPS_RSBA) ? " RSBA"
: "",
@@ -431,6 +431,7 @@ static void __init print_details(enum ind_thunk thunk,
uint64_t caps)
(caps & ARCH_CAPS_SBDR_SSDP_NO) ? " SBDR_SSDP_NO"
: "",
(caps & ARCH_CAPS_FBSDP_NO) ? " FBSDP_NO"
: "",
(caps & ARCH_CAPS_PSDP_NO) ? " PSDP_NO"
: "",
+ (caps & ARCH_CAPS_PBRSB_NO) ? " PBRSB_NO"
: "",
(e8b & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS)) ? " IBRS_ALWAYS"
: "",
(e8b & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS)) ? " STIBP_ALWAYS"
: "",
(e8b & cpufeat_mask(X86_FEATURE_IBRS_FAST)) ? " IBRS_FAST"
: "",
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 63b77cd19a..ce5677f3b6 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -63,6 +63,7 @@
#define ARCH_CAPS_FB_CLEAR_CTRL (_AC(1, ULL) << 18)
#define ARCH_CAPS_RRSBA (_AC(1, ULL) << 19)
#define ARCH_CAPS_BHI_NO (_AC(1, ULL) << 20)
+#define ARCH_CAPS_PBRSB_NO (_AC(1, ULL) << 24)
#define MSR_FLUSH_CMD 0x0000010b
#define FLUSH_CMD_L1D (_AC(1, ULL) << 0)
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.14
|
![]() |
Lists.xenproject.org is hosted with RackSpace, monitoring our |