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[xen stable-4.17] x86/boot: Move MSR policy initialisation logic into cpu-policy.c

Date: Wed, 09 Aug 2023 23:46:23 +0000

Delivery-date: Wed, 09 Aug 2023 23:46:25 +0000

List-id: "Change log for Mercurial \(receive only\)" <xen-changelog.lists.xenproject.org>

commit 1fbaca2721c089c3afcda42b6387a8b42ed49618 Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> AuthorDate: Mon Apr 3 17:48:43 2023 +0100 Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> CommitDate: Tue Aug 8 16:02:17 2023 +0100 x86/boot: Move MSR policy initialisation logic into cpu-policy.c Switch to the newer cpu_policy nomenclature. No practical change. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Acked-by: Jan Beulich <jbeulich@xxxxxxxx> (cherry picked from commit 4f20f596ce9bd95bde077a1ae0d7e07d20a5f6be) --- xen/arch/x86/cpu-policy.c | 84 +++++++++++++++++++++++++++++++++++ xen/arch/x86/include/asm/cpu-policy.h | 3 ++ xen/arch/x86/include/asm/msr.h | 1 - xen/arch/x86/msr.c | 84 ----------------------------------- xen/arch/x86/setup.c | 3 +- 5 files changed, 89 insertions(+), 86 deletions(-) diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index e9ac1269c3..f6a2317ed7 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -20,6 +20,90 @@ struct cpu_policy __ro_after_init hvm_max_cpu_policy; struct cpu_policy __ro_after_init hvm_def_cpu_policy; #endif +static void __init calculate_raw_policy(void) +{ + struct cpu_policy *p = &raw_cpu_policy; + + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ + /* Was already added by probe_cpuid_faulting() */ + + if ( cpu_has_arch_caps ) + rdmsrl(MSR_ARCH_CAPABILITIES, p->arch_caps.raw); +} + +static void __init calculate_host_policy(void) +{ + struct cpu_policy *p = &host_cpu_policy; + + *p = raw_cpu_policy; + + /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ + /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ + p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; + + /* Temporary, until we have known_features[] for feature bits in MSRs. */ + p->arch_caps.raw &= + (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | + ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | + ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | + ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | + ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | + ARCH_CAPS_PBRSB_NO); +} + +static void __init calculate_pv_max_policy(void) +{ + struct cpu_policy *p = &pv_max_cpu_policy; + + *p = host_cpu_policy; + + p->arch_caps.raw = 0; /* Not supported yet. */ +} + +static void __init calculate_pv_def_policy(void) +{ + struct cpu_policy *p = &pv_def_cpu_policy; + + *p = pv_max_cpu_policy; +} + +static void __init calculate_hvm_max_policy(void) +{ + struct cpu_policy *p = &hvm_max_cpu_policy; + + *p = host_cpu_policy; + + /* It's always possible to emulate CPUID faulting for HVM guests */ + p->platform_info.cpuid_faulting = true; + + p->arch_caps.raw = 0; /* Not supported yet. */ +} + +static void __init calculate_hvm_def_policy(void) +{ + struct cpu_policy *p = &hvm_def_cpu_policy; + + *p = hvm_max_cpu_policy; +} + +void __init init_guest_cpu_policies(void) +{ + calculate_raw_policy(); + calculate_host_policy(); + + if ( IS_ENABLED(CONFIG_PV) ) + { + calculate_pv_max_policy(); + calculate_pv_def_policy(); + } + + if ( hvm_enabled ) + { + calculate_hvm_max_policy(); + calculate_hvm_def_policy(); + } +} + int init_domain_cpu_policy(struct domain *d) { struct cpu_policy *p = is_pv_domain(d) diff --git a/xen/arch/x86/include/asm/cpu-policy.h b/xen/arch/x86/include/asm/cpu-policy.h index 9ba34bbf5e..13e2a1f86d 100644 --- a/xen/arch/x86/include/asm/cpu-policy.h +++ b/xen/arch/x86/include/asm/cpu-policy.h @@ -12,6 +12,9 @@ extern struct cpu_policy pv_def_cpu_policy; extern struct cpu_policy hvm_max_cpu_policy; extern struct cpu_policy hvm_def_cpu_policy; +/* Initialise the guest cpu_policy objects. */ +void init_guest_cpu_policies(void); + /* Allocate and initialise a CPU policy suitable for the domain. */ int init_domain_cpu_policy(struct domain *d); diff --git a/xen/arch/x86/include/asm/msr.h b/xen/arch/x86/include/asm/msr.h index a174bc6e89..b51d92e27c 100644 --- a/xen/arch/x86/include/asm/msr.h +++ b/xen/arch/x86/include/asm/msr.h @@ -397,7 +397,6 @@ struct vcpu_msrs uint32_t dr_mask[4]; }; -void init_guest_msr_policy(void); int init_vcpu_msr_policy(struct vcpu *v); /* diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index d3ca861454..14bcb8261c 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -38,90 +38,6 @@ DEFINE_PER_CPU(uint32_t, tsc_aux); -static void __init calculate_raw_policy(void) -{ - struct msr_policy *mp = &raw_cpu_policy; - - /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ - /* Was already added by probe_cpuid_faulting() */ - - if ( cpu_has_arch_caps ) - rdmsrl(MSR_ARCH_CAPABILITIES, mp->arch_caps.raw); -} - -static void __init calculate_host_policy(void) -{ - struct msr_policy *mp = &host_cpu_policy; - - *mp = raw_cpu_policy; - - /* 0x000000ce MSR_INTEL_PLATFORM_INFO */ - /* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */ - mp->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; - - /* Temporary, until we have known_features[] for feature bits in MSRs. */ - mp->arch_caps.raw &= - (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | - ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | - ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO | - ARCH_CAPS_SBDR_SSDP_NO | ARCH_CAPS_FBSDP_NO | ARCH_CAPS_PSDP_NO | - ARCH_CAPS_FB_CLEAR | ARCH_CAPS_RRSBA | ARCH_CAPS_BHI_NO | - ARCH_CAPS_PBRSB_NO); -} - -static void __init calculate_pv_max_policy(void) -{ - struct msr_policy *mp = &pv_max_cpu_policy; - - *mp = host_cpu_policy; - - mp->arch_caps.raw = 0; /* Not supported yet. */ -} - -static void __init calculate_pv_def_policy(void) -{ - struct msr_policy *mp = &pv_def_cpu_policy; - - *mp = pv_max_cpu_policy; -} - -static void __init calculate_hvm_max_policy(void) -{ - struct msr_policy *mp = &hvm_max_cpu_policy; - - *mp = host_cpu_policy; - - /* It's always possible to emulate CPUID faulting for HVM guests */ - mp->platform_info.cpuid_faulting = true; - - mp->arch_caps.raw = 0; /* Not supported yet. */ -} - -static void __init calculate_hvm_def_policy(void) -{ - struct msr_policy *mp = &hvm_def_cpu_policy; - - *mp = hvm_max_cpu_policy; -} - -void __init init_guest_msr_policy(void) -{ - calculate_raw_policy(); - calculate_host_policy(); - - if ( IS_ENABLED(CONFIG_PV) ) - { - calculate_pv_max_policy(); - calculate_pv_def_policy(); - } - - if ( hvm_enabled ) - { - calculate_hvm_max_policy(); - calculate_hvm_def_policy(); - } -} - int init_vcpu_msr_policy(struct vcpu *v) { struct vcpu_msrs *msrs = xzalloc(struct vcpu_msrs); diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index 09c17b1016..1d62ea1ad9 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -50,6 +50,7 @@ #include <asm/nmi.h> #include <asm/alternative.h> #include <asm/mc146818rtc.h> +#include <asm/cpu-policy.h> #include <asm/cpuid.h> #include <asm/spec_ctrl.h> #include <asm/guest.h> @@ -1943,7 +1944,7 @@ void __init noreturn __start_xen(unsigned long mbi_p) panic("Could not protect TXT memory regions\n"); init_guest_cpuid(); - init_guest_msr_policy(); + init_guest_cpu_policies(); if ( xen_cpuidle ) xen_processor_pmbits |= XEN_PROCESSOR_PM_CX; -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.17

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