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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen master] xen/arm32: head: Add missing isb in setup_fixmap()
commit f7c24c2907d4092a1cdc63d0a850e5d887545b61
Author: Julien Grall <jgrall@xxxxxxxxxx>
AuthorDate: Tue Jul 4 19:57:00 2023 +0100
Commit: Julien Grall <jgrall@xxxxxxxxxx>
CommitDate: Tue Jul 4 20:07:47 2023 +0100
xen/arm32: head: Add missing isb in setup_fixmap()
Per the Arm Arm (ARM DDI 0406C.d A3.8.3):
"The DMB and DSB memory barriers affect reads and writes to the memory
system generated by load/store instructions and data or unified cache
maintenance operations being executed by the processor. Instruction
fetches or accesses caused by a hardware translation table access are
not explicit accesses."
In setup_fixmap(), we write the fixmap area and may be used soon after,
for instance, to write to the UART. IOW, there could be hardware
translation table access. So we need to ensure the 'dsb' has completed
before continuing. Therefore add an 'isb'.
Fixes: e79999e587d7 ("xen/arm32: head: Remove 1:1 mapping as soon as it is
not used")
Signed-off-by: Julien Grall <jgrall@xxxxxxxxxx>
Reviewed-by: Henry Wang <Henry.Wang@xxxxxxx>
Tested-by: Henry Wang <Henry.Wang@xxxxxxx>
Reviewed-by: Luca Fancellu <luca.fancellu@xxxxxxx>
Reviewed-by: Bertrand Marquis <bertrand.marquis@xxxxxxx>
---
xen/arch/arm/arm32/head.S | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
index 451579051c..4cfda2cf70 100644
--- a/xen/arch/arm/arm32/head.S
+++ b/xen/arch/arm/arm32/head.S
@@ -791,6 +791,11 @@ setup_fixmap:
create_table_entry boot_second, xen_fixmap, r0, 2
/* Ensure any page table updates made above have occurred. */
dsb nshst
+ /*
+ * The fixmap area will be used soon after. So ensure no hardware
+ * translation happens before the dsb completes.
+ */
+ isb
mov pc, lr
ENDPROC(setup_fixmap)
--
generated by git-patchbot for /home/xen/git/xen.git#master
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